GaN Driver. UCC27611 Datasheet

UCC27611 Driver. Datasheet pdf. Equivalent

UCC27611 Datasheet
Recommendation UCC27611 Datasheet
Part UCC27611
Description 4-A to 6-A Low Side GaN Driver
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UCC27611
SLUSBA5F – DECEMBER 2012 – REVISED MARCH 2018
UCC27611 5-V, 4-A to 6-A Low Side GaN Driver
1 Features
1 Enhancement Mode Gallium Nitride FETs
(eGANFETs)
• 4-V to 18-V Single Supply Range VDD Range
• Drive Voltage VREF Regulated to 5 V
• 4-A Peak Source and 6-A Peak Sink Drive
Current
• 1-and 0.35-Pullup and Pulldown Resistance
(Maximize High Slew-Rate dV and dt Immunity)
• Split Output Configuration (Allows Turnon and
Turnoff Optimization for Individual FETs)
• Fast Propagation Delays (14-ns Typical)
• Fast Rise and Fall Times (9-ns and 5-ns Typical)
• TTL and CMOS Compatible Inputs (Independent
of Supply Voltage Allow Easy Interface-to-Digital
and Analog Controllers)
• Dual-Input Design Offering Drive Flexibility (Both
Inverting and Noninverting Configurations)
• Output Held Low When Inputs Are Floating
• VDD Under Voltage Lockout (UVLO)
• Optimized Pinout Compatible With eGANFET
Footprint for Easy Layout
• 2.00 mm × 2.00 mm SON-6 Package With
Exposed Thermal and Ground Pad, (Minimized
Parasitic Inductances to Reduce Gate Ringing)
• Operating Temperature Range of –40°C to 140°C
2 Applications
• Switch-Mode Power Supplies
• DC-to-DC Converters
• Synchronous Rectification
• Solar Inverters, Motor Control, UPS
• Envelope Tracking Power Supplies
3 Description
The UCC27611 is a single-channel, high-speed, gate
driver optimized for 5-V drive, specifically addressing
enhancement mode GaN FETs. The drive voltage
VREF is precisely controlled by internal linear
regulator to 5 V. The UCC27611 offers asymmetrical
rail-to-rail peak current drive capability with 4-A
source and 6-A sink. Split output configuration allows
individual turnon and turnoff time optimization
depending on FET. Package and pinout with
minimum parasitic inductances reduce the rise and
fall time and limit the ringing. Additionally, the short
propagation delay with minimized tolerances and
variations allows efficient operation at high
frequencies. The 1-Ω and 0.35-Ω resistance boosts
immunity to hard switching with high slew rate dV and
dt.
The independence from VDD input signal thresholds
ensure TTL and CMOS low-voltage logic
compatibility. For safety reason, when the input pins
are in a floating condition, the internal input pullup
and pulldown resistors hold the output LOW. Internal
circuitry on VREF pin provides an undervoltage
lockout function that holds output LOW until VREF
supply voltage is within operating range. UCC27611
is offered in a small 2.00 mm × 2.00 mm SON-6
package (DRV) with exposed thermal and ground pad
that improves the package power-handling capability.
The UCC27611 operates over wide temperature
range from –40°C to 140°C.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
UCC27611
SON (6)
2.00 mm × 2.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Non-Inverting Input
Typical Application Diagram
Inverting Input
4.5 V to 18 V
VDD
IN+
VREF
VSOURCE
C3
C2
UCC27611
1 VDD
VREF 6
2 IN-
OUTH 5
3 IN+
OUTL 4
GND
7
R1
R2
L1
D1
Q1
VOUT
+
C1
4.5 V to 18 V
VDD
IN-
VREF
VREF
VSOURCE
C3
C2
UCC27611
1 VDD
VREF 6
2 IN-
OUTH 5
3 IN+
OUTL 4
GND
7
R1
R2
L1
D1
Q1
VOUT
+
C1
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



Texas Instruments UCC27611
UCC27611
SLUSBA5F – DECEMBER 2012 – REVISED MARCH 2018
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 3
6.1 Absolute Maximum Ratings ...................................... 3
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Switching Characteristics .......................................... 5
6.7 Typical Characteristics .............................................. 7
7 Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 8
7.3 Feature Description................................................... 8
7.4 Device Functional Modes........................................ 11
8 Application and Implementation ........................ 12
8.1 Application Information............................................ 12
8.2 Typical Application ................................................. 13
9 Power Supply Recommendations...................... 18
10 Layout................................................................... 20
10.1 Layout Guidelines ................................................. 20
10.2 Layout Example .................................................... 20
11 Device and Documentation Support ................. 21
11.1 Documentation Support ........................................ 21
11.2 Receiving Notification of Documentation Updates 21
11.3 Community Resources.......................................... 21
11.4 Trademarks ........................................................... 21
11.5 Electrostatic Discharge Caution ............................ 21
11.6 Glossary ................................................................ 21
12 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (February 2018) to Revision F
Page
• Changed Power Up (Noninverting Drive) graphic ................................................................................................................. 9
• Changed Power Up (Inverting Drive) graphic......................................................................................................................... 9
Changes from Revision D (October 2017) to Revision E
Page
• Changed title ......................................................................................................................................................................... 1
Changes from Revision C (December 2015) to Revision D
Page
• Changed title ......................................................................................................................................................................... 1
Changes from Revision B (May 2013) to Revision C
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
Changes from Revision A (December 2012) to Revision B
Page
• Added Electrical Characteristics Inputs (IN+, IN–) section values ......................................................................................... 5
2 Submit Documentation Feedback
Product Folder Links: UCC27611
Copyright © 2012–2018, Texas Instruments Incorporated



Texas Instruments UCC27611
www.ti.com
5 Pin Configuration and Functions
UCC27611
SLUSBA5F – DECEMBER 2012 – REVISED MARCH 2018
DRV Package
6-Pin SON With Exposed Thermal Pad
Top View
VDD 1
6 VREF
GND PAD
IN- 2
Pin 7
5 OUTH
IN+ 3
4 OUTL
Pin Functions
PIN
NO. NAME
I/O
DESCRIPTION
1
VDD
I
Bias supply input. Connect a ceramic capacitor minimum from this pin to the GND pin as
close as possible to the device with the shortest trace lengths possible.
2
IN–
I
Inverting input. Pull IN+ to VDD to enable output, when using the driver device in Inverting
configuration.
3
IN+
I
Noninverting input. Pull IN– to GND to enable output, when using the driver device in
noninverting configuration.
4
OUTL
O 6-A sink current output of driver.
5
OUTH
O 4-A source current output of driver.
Drive voltage, output of internal linear regulator. Connect a ceramic capacitor minimum from
6
VREF
O this pin to the GND pin as close as possible to the device with the shortest trace lengths
possible.
7
GND PAD
— Ground. All signals are referenced to this node.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
VDD Supply voltage
OUTH
–0.3 20 V
–0.3
VREF + 0.3
V
OUTL
–0.3
VREF + 0.3
V
VREF
6V
IN+, IN–
–0.3 20 V
Iout_DC Continuous source current of OUTH/sink current of OUTL
Iout_pulsed
Continuous source current of OUTH/sink current of OUTL
(0.5 µs),
0.3
4
0.6 A
6A
Lead temperature, soldering, 10 sec.
300 °C
Lead temperature, reflow
260 °C
TJ Operating virtual junction temperature
Tstg Storage temperature
–40 150 °C
–65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Copyright © 2012–2018, Texas Instruments Incorporated
Product Folder Links: UCC27611
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