SR05-02CTG Array Datasheet

SR05-02CTG Datasheet, PDF, Equivalent


Part Number

SR05-02CTG

Description

5V 25A Diode Array

Manufacture

Littelfuse

Total Page 4 Pages
Datasheet
Download SR05-02CTG Datasheet


SR05-02CTG
TVS Diode Arrays (SPA® Diodes)
Lightning Surge Protection- SR05 Series
SR05 Series 5V 25A Diode Array
RoHS Pb GREEN
Description
The SR05 consists of four, low capacitance steering diodes
and a low voltage TVS diode that provide protection against
ESD and lightning surge events. Each channel or I/O pin
can safely absorb up to 25A (tp=8/20μs) and repetitive ESD
strikes above the maximum level (Level 4) specified in the
IEC 61000-4-2 international standard without performance
degradation.
The low loading capacitance makes it ideal for protecting
high-speed telecommunication data lines.
Pinout
SOT143
GND
Vcc
I/O 1
I/O 2
Functional Block Diagram
PIN 4
PIN 2
PIN 3
Features
• ESD, IEC61000-4-2 ,
±30kV contact discharge,
±30kV air discharge
• EFT, IEC61000-4-4, 80A
(tp=5/50ns)
• L ightning protection,
IEC61000-4-5, 25A
(tp=8/20µs)
• Low capacitance of 6.0pF
(TYP) per I/O
• L ow clamp voltage
• Small SOT143 (JEDEC TO-
253) packaging
• Moisture Sensitivity Level
(MSL-1)
Applications
• T1/E1 IC/Secondary
Protection
• Ethernet 10BaseT
• WAN/LAN Equipment
• ISDN S/T Interface
• Video Lines
• Microcontroller Input
Protection
Application Example
I/O I/O
VCC
GND (PIN 1)
Additional Information
Datasheet
Resources
Samples
Life Support Note:
Not Intended for Use in Life Support or Life Saving Applications
The products shown herein are not designed for use in life sustaining or life
saving applications unless otherwise expressly indicated.
14
23
The SR05 integrates aTVS Diode between the Vcc and Gnd
pins. This allows the array to protect the power supply
against ESD and lighting surges when these pins are both
connected in the application.
© 2017 Littelfuse, Inc.
Specifications are subject to change without notice.
Revised: 02/23/17

SR05-02CTG
TVS Diode Arrays (SPA® Diodes)
Lightning Surge Protection- SR05 Series
Absolute Maximum Ratings
Symbol
IPP
PPk
TOP
TSTOR
Parameter
Peak Current (tp=8/20μs)
Peak Pulse Power (tp=8/20μs)
Operating Temperature
Value
25.0
450
–40 to 125
Storage Temperature
–55 to 150
Units
A
W
°C
°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress only rating and operation of the device
at these or any other conditions above those indicated in the operational sections of this
specification is not implied.
Thermal Information
Parameter
Storage Temperature Range
Maximum Junction Temperature
Maximum Lead Temperature
(Soldering 20-40s)
Electrical Characteristics (TOP=25ºC)
Parameter
Reverse Stand-Off Voltage
Reverse Leakage Current
Reverse Breakdown Voltage
Clamping Voltage, Line-Ground1
Clamping Voltage, Line-Ground1
Clamping Voltage, Line-Ground1
Dynamic Resistance, Line-Ground1
Symbol
VRWM
IR
VBR
VC
VC
VC
RDYN
ESD Withstand Voltage1
VESD
Diode Capacitance1
CI/O-I/O
CI/O-GND
Test Conditions
VR= 5V, I/O to GND
It = 1mA
IPP= 1A, tp=8/20 µs
IPP= 10A, tp=8/20 µs
IPP= 25A, tp=8/20 µs
( VC2-VC1)/(IPP2-IPP1)
IEC61000-4-2 (Contact Discharge)
IEC61000-4-2 (Air Discharge)
Reverse Bias=0V
Reverse Bias=0V
Note: 1. Parameter is guaranteed by design and/or device characterization.
Min
-
-
6.0
-
-
-
-
±30
±30
-
-
Typ
-
-
-
-
-
-
0.3
-
3.0
6.0
Capacitance vs. Reverse Bias
8/20μs Pulse Waveform
Rating
–55 to 150
150
260
Units
°C
°C
°C
Max
5.0
5.0
-
9.8
12.0
18.0
-
-
-
10.0
Units
V
µA
V
V
V
V
kV
kV
pF
pF
10.0
9.0
8.0
7.0
Vcc Open
6.0
5.0
4.0
3.0
Vcc=3.3V
Vcc=5V
2.0
1.0
0.0
0.0 1.0 2.0 3.0 4.0 5.0
Reverse Bias (V)
110%
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
0.0
5.0
10.0
15.0
20.0
25.0
30.0
Time (μs)
© 2017 Littelfuse, Inc.
Specifications are subject to change without notice.
Revised: 02/23/17


Features TVS Diode Arrays (SPA® Diodes) Lightnin g Surge Protection- SR05 Series SR05 Se ries 5V 25A Diode Array RoHS Pb GREEN Description The SR05 consists of four, low capacitance steering diodes and a low voltage TVS diode that provide prot ection against ESD and lightning surge events. Each channel or I/O pin can saf ely absorb up to 25A (tp=8/20μs) and r epetitive ESD strikes above the maximum level (Level 4) specified in the IEC 6 1000-4-2 international standard without performance degradation. The low loadi ng capacitance makes it ideal for prote cting high-speed telecommunication data lines. Pinout SOT143 GND Vcc I/O 1 I/O 2 Functional Block Diagram PIN 4 PIN 2 PIN 3 Features • ESD, IE C61000-4-2 , ±30kV contact discharge, ±30kV air discharge • EFT, IEC61000- 4-4, 80A (tp=5/50ns) • L ightning pr otection, IEC61000-4-5, 25A (tp=8/20µs ) • Low capacitance of 6.0pF (TYP) p er I/O • L ow clamp voltage • Smal l SOT143 (JEDEC TO253) packaging • Moisture Sensitivity Level (MSL-1) Applicati.
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