DRV8304 Driver Datasheet

DRV8304 Datasheet, PDF, Equivalent


Part Number

DRV8304

Description

38-V 3-Phase Smart Gate Driver

Manufacture

etcTI

Total Page 30 Pages
Datasheet
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DRV8304
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DRV8304
SLVSE39B – NOVEMBER 2017 – REVISED JULY 2018
DRV8304 38-V 3-Phase Smart Gate Driver
1 Features
1 6-V to 38-V, Triple Half-Bridge Gate Driver With
Integrated 3x Current Sense Amplifiers (CSA)
– 40-V Absolute Maximum Rating
– Fully Optimized for 12-V and 24-V DC Rails
– Drives High-Side and Low-Side N-Channel
MOSFETs
– Supports 100% PWM Duty Cycle
• Smart Gate-Drive Architecture
– Adjustable Slew-Rate Control for Better EMI
and EMC Performance
– VGS Hand-Shake and Minimum Dead-Time
Insertion to Avoid Shoot-Through
– 15-mA to 150-mA Peak Source Current
– 30-mA to 300-mA Peak Sink Current
• 6x, 3x, 1x and Independent PWM Modes
– Supports 120º Sensored Operation
• Integrated Gate-Driver Power Supplies
– High-Side Doubler Charge Pump
– Low-Side Linear Regulator
• Integrated Triple Current-Shunt Amplifiers
– Adjustable Gain (5, 10, 20, 40 V/V)
– Bidirectional or Unidirectional Support
• SPI or Hardware Device Variants
• Supports 1.8-V, 3.3-V, and 5-V Logic Inputs
• Low-Power Sleep Mode
• Linear Voltage Regulator, 3.3-V, 30-mA
• Integrated Protection Features
– VM Undervoltage Lockout (UVLO)
– Charge Pump Undervoltage (CPUV)
– MOSFET VDS Overcurrent Protection (OCP)
– MOSFET Shoot-Through Protection
– Gate Driver Fault (GDF)
– Thermal Warning and Shutdown (OTW/OTSD)
– Fault Condition Indicator (nFAULT)
2 Applications
• Printers
• BLDC Motor Modules
• White Goods
• CPAPs, Fans, and Pumps
• Drones, Robotics, and RC Toys
• ATM and Currency Counting
3 Description
The DRV8304 device is an integrated gate driver for
3-phase brushless DC (BLDC) motors applications for
12-V and 24-V DC rails. These applications include
field-oriented control (FOC), sinusoidal current
control, and trapezoidal current control of BLDC
motors. The device integrates three current-sense
amplifiers (CSA) for sensing the phase currents of
BLDC motors for optimum FOC and current-control
system implementation. An AUTOCAL feature
automatically calibrates the CSA offset error for
accurate current sensing.
The device is based on smart gate-drive (SGD)
architecture to eliminate the need of any external
gate components (resistors and Zener diodes) while
fully protecting the external FETs. The SGD
architecture optimizes dead time to avoid any shoot-
through conditions, provides flexibility in decreasing
electromagnetic interference (EMI) by gate slew-rate
control, and protects against any gate-short
conditions through VGS hand-shaking and dead time
insertion. Strong pulldown current also prevents any
dv/dt gate turnon.
Various PWM control modes (1x, 3x, 6x, and
independent) are supported for simple interfacing to
control circuits that can be powered by the 30-mA,
3.3-V internal regulator. These modes decrease the
number of output peripherals of the controller for the
specific motor-control requirements and provide
flexibility of control. The device also has a 1x mode
for sensored trapezoidal control of the BLDC motor
by using the internal block-commutation table. The
device can also be configured to drive multiple loads,
such as solenoids, in independent mode.
Device Information(1)
PART NUMBER
PACKAGE
INTERFACE
DRV8304
VQFN (40)
Hardware
SPI
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
6 to 38 V
PWM
ENABLE
H/W
nFAULT
Sense Output
DRV8304
3 Half Bridge
Smart Gate Driver
3x Shunt Amplifiers
Built-In Protection
Gate
Drive
Current
Sense
M
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.

DRV8304
DRV8304
SLVSE39B – NOVEMBER 2017 – REVISED JULY 2018
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information .................................................. 6
6.5 Electrical Characteristics........................................... 6
6.6 Timing Requirements .............................................. 10
6.7 Typical Characteristics ............................................ 11
7 Detailed Description ............................................ 13
7.1 Overview ................................................................. 13
7.2 Functional Block Diagram ....................................... 14
7.3 Feature Description................................................. 16
7.4 Device Functional Modes........................................ 35
7.5 Programming........................................................... 35
7.6 Register Maps ......................................................... 37
8 Application and Implementation ........................ 45
8.1 Application Information............................................ 45
8.2 Typical Application ................................................. 45
9 Power Supply Recommendations...................... 53
9.1 Bulk Capacitance Sizing ......................................... 53
10 Layout................................................................... 54
10.1 Layout Guidelines ................................................. 54
10.2 Layout Example .................................................... 55
11 Device and Documentation Support ................. 56
11.1 Device Support...................................................... 56
11.2 Documentation Support ........................................ 56
11.3 Receiving Notification of Documentation Updates 56
11.4 Community Resources.......................................... 57
11.5 Trademarks ........................................................... 57
11.6 Electrostatic Discharge Caution ............................ 57
11.7 Glossary ................................................................ 57
12 Mechanical, Packaging, and Orderable
Information ........................................................... 57
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (June 2018) to Revision B
Page
• Deleted preview status from the SPI version of the device.................................................................................................... 1
Changes from Original (November 2017) to Revision A
Page
• Changed the data sheet from Advance Information to Production Data................................................................................ 1
2 Submit Documentation Feedback
Product Folder Links: DRV8304
Copyright © 2017–2018, Texas Instruments Incorporated


Features Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity Reference Design DRV8304 SLVSE 39B – NOVEMBER 2017 – REVISED JULY 2018 DRV8304 38-V 3-Phase Smart Gate Dr iver 1 Features •1 6-V to 38-V, Trip le Half-Bridge Gate Driver With Integra ted 3x Current Sense Amplifiers (CSA) 40-V Absolute Maximum Rating – Ful ly Optimized for 12-V and 24-V DC Rails – Drives High-Side and Low-Side N-Ch annel MOSFETs – Supports 100% PWM Dut y Cycle • Smart Gate-Drive Architectu re – Adjustable Slew-Rate Control for Better EMI and EMC Performance – VGS Hand-Shake and Minimum Dead-Time Inser tion to Avoid Shoot-Through – 15-mA t o 150-mA Peak Source Current – 30-mA to 300-mA Peak Sink Current • 6x, 3x, 1x and Independent PWM Modes – Suppo rts 120º Sensored Operation • Integr ated Gate-Driver Power Supplies – Hig h-Side Doubler Charge Pump – Low-Side Linear Regulator • Integrated Triple Current-Shunt Amplifiers – Adjustable Gain (5, 10, 20, 40 V/V) – Bidirectional or Unidirectional Su.
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