SN74CBT1G125 SWITCH Datasheet

SN74CBT1G125 Datasheet, PDF, Equivalent


Part Number

SN74CBT1G125

Description

SINGLE FET BUS SWITCH

Manufacture

etcTI

Total Page 13 Pages
Datasheet
Download SN74CBT1G125 Datasheet


SN74CBT1G125
SN74CBT1G125
SINGLE FET BUS SWITCH
D 5-Switch Connection Between Two Ports
D TTL-Compatible Control Input Levels
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
SCDS046G – FEBRUARY 1998 – REVISED JANUARY 2003
DBV OR DCK PACKAGE
(TOP VIEW)
OE
A
GND
1
2
3
5 VCC
4B
description/ordering information
The SN74CBT1G125 features a single high-speed line switch. The switch is disabled when the output-enable
(OE) input is high.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
–40°C to 85°C
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
SN74CBT1G125DBVR
SN74CBT1G125DBVT
SN74CBT1G125DCKR
SN74CBT1G125DCKT
S25_
SM_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUT
OE
FUNCTION
L A port = B port
H Disconnect
logic diagram (positive logic)
2
A
1
OE
4
B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
1

SN74CBT1G125
SN74CBT1G125
SINGLE FET BUS SWITCH
SCDS046G FEBRUARY 1998 REVISED JANUARY 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, θJA (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W
DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN MAX UNIT
VCC Supply voltage
4 5.5 V
VIH High-level control input voltage
2V
VIL Low-level control input voltage
0.8 V
TA Operating free-air temperature
40 85 °C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYPMAX UNIT
VIK
VCC = 4.5 V,
II = 18 mA
1.2 V
II
VCC = 5.5 V,
VI = 5.5 V or GND
±1 µA
ICC
VCC = 5.5 V,
IO = 0,
VI = VCC or GND
1 µA
Ci Control input VI = 3 V or 0
3 pF
Cio(OFF)
VO = 3 V or 0,
OE = VCC
4 pF
VCC = 4 V,
TYP at VCC = 4 V, VI = 2.4 V,
II = 15 mA
14 20
ron§
VCC = 4.5 V
VI = 0
II = 64 mA
II = 30 mA
57
57
VI = 2.4 V,
II = 15 mA
10 15
All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
§ Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined
by the lower of the voltages of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4 V
MIN MAX
VCC = 5 V
± 0.5 V
MIN MAX
UNIT
tpd
A or B
B or A
0.35 0.25 ns
ten
OE
A or B
5.5 1.6 4.9 ns
tdis
OE
A or B
4.5 1 4.2 ns
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Features SN74CBT1G125 SINGLE FET BUS SWITCH D 5- Ω Switch Connection Between Two Ports D TTL-Compatible Control Input Levels D Latch-Up Performance Exceeds 250 mA P er JESD 17 D ESD Protection Exceeds JES D 22 – 2000-V Human-Body Model (A114- A) – 200-V Machine Model (A115-A) SC DS046G – FEBRUARY 1998 – REVISED JA NUARY 2003 DBV OR DCK PACKAGE (TOP VIEW ) OE A GND 1 2 3 5 VCC 4B descripti on/ordering information The SN74CBT1G12 5 features a single high-speed line swi tch. The switch is disabled when the ou tput-enable (OE) input is high. ORDERI NG INFORMATION TA PACKAGE† ORDERAB LE PART NUMBER TOP-SIDE MARKING‡ 40°C to 85°C SOT (SOT-23) – DBV S OT (SC-70) – DCK Reel of 3000 Reel o f 250 Reel of 3000 Reel of 250 SN74CBT 1G125DBVR SN74CBT1G125DBVT SN74CBT1G125 DCKR SN74CBT1G125DCKT S25_ SM_ † Pa ckage drawings, standard packing quanti ties, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ The actual top-side marking has one additional character that.
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