74HC240D Buffer Datasheet

74HC240D Datasheet, PDF, Equivalent


Part Number

74HC240D

Description

Octal Bus Buffer

Manufacture

Toshiba

Total Page 7 Pages
Datasheet
Download 74HC240D Datasheet


74HC240D
CMOS Digital Integrated Circuits Silicon Monolithic
74HC240D,74HC244D
74HC240D,74HC244D
1. Functional Description
• Octal Bus Buffer
74HC240D: INVERTED, 3-STATE OUTPUTS
74HC244D: NON-INVERTED, 3-STATE OUTPUTS
2. General
The 74HC240D and 74HC244D are high speed CMOS OCTAL BUS BUFFERs fabricated with silicon gate C2MOS
technology.
They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
The 74HC240D is an inverting 3-state buffer and the 74HC244D are non-inverting 3-state buffers having two
active-low output enables.
These devices are designed to be used with 3-state memory address drivers, etc.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3. Features
(1) High speed: tpd = 10 ns (typ.) at VCC = 6.0 V
(2) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25
(3) Balanced propagation delays: tPLH tPHL
(4) Wide operating voltage range: VCC(opr) = 2.0 V to 6.0 V
4. Packaging
SOIC20
©2016 Toshiba Corporation
1
Start of commercial production
2016-04
2016-05-24
Rev.2.0

74HC240D
5. Pin Assignment
74HC240D
74HC240D,74HC244D
74HC244D
6. Marking
74HC240D
7. IEC Logic Symbol
74HC240D
74HC244D
74HC244D
©2016 Toshiba Corporation
2
2016-05-24
Rev.2.0


Features CMOS Digital Integrated Circuits Silicon Monolithic 74HC240D,74HC244D 74HC240D ,74HC244D 1. Functional Description Octal Bus Buffer 74HC240D: INVERTED, 3-STATE OUTPUTS 74HC244D: NON-INVERTED, 3-STATE OUTPUTS 2. General The 74HC240 D and 74HC244D are high speed CMOS OCTA L BUS BUFFERs fabricated with silicon g ate C2MOS technology. They achieve the high speed operation similar to equival ent LSTTL while maintaining the CMOS lo w power dissipation. The 74HC240D is an inverting 3-state buffer and the 74HC2 44D are non-inverting 3-state buffers h aving two active-low output enables. Th ese devices are designed to be used wit h 3-state memory address drivers, etc. All inputs are equipped with protection circuits against static discharge or t ransient excess voltage. 3. Features (1 ) High speed: tpd = 10 ns (typ.) at VCC = 6.0 V (2) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25  (3) Bal anced propagation delays: tPLH ≈ tPHL (4) Wide operating voltage range: VCC(opr) = 2.0 V to 6.0 V 4. Packag.
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