CDC203 DRIVER Datasheet

CDC203 Datasheet, PDF, Equivalent


Part Number

CDC203

Description

3.3-V HEX INVERTER/CLOCK DRIVER

Manufacture

etcTI

Total Page 8 Pages
Datasheet
Download CDC203 Datasheet


CDC203
CDC203
3.3-V HEX INVERTER/CLOCK DRIVER
D Replaces 74AC11203
D Low-Skew Propagation Delay
Specifications for Clock Driver
Applications
D Operates at 3.3-V VCC
D Flow-Through Architecture Optimizes
PCB Layout
D Center-Pin VCC and GND Pin
Configurations Minimize High-Speed
Switching Noise
D EPIC(Enhanced-Performance Implanted
CMOS) 1-µm Process
D 500-mA Typical Latch-Up Immunity
at 125°C
D Packaged in Plastic Small-Outline Package
SCAS324A – OCTOBER 1989 – REVISED NOVEMBER 1995
DW PACKAGE
(TOP VIEW)
1Y
2Y
3Y
GND
GND
GND
GND
4Y
5Y
6Y
1
2
3
4
5
6
7
8
9
10
20 1A
19 2A
18 3A
17 NC
16 VCC
15 VCC
14 NC
13 4A
12 5A
11 6A
NC – No internal connection
description
The CDC203 contains six independent inverters. The device performs the Boolean function Y = A. It is designed
specifically for applications requiring low skew between switching outputs.
The CDC203 is characterized for operation from 25°C to 70°C.
FUNCTION TABLE
INPUT
A
OUTPUT
Y
HL
LH
logic symbol
20
1A
19
2A
18
3A
13
4A
12
5A
11
6A
1
1
1Y
2
2Y
3
3Y
8
4Y
9
5Y
10
6Y
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
logic diagram (positive logic)
20
1A
1 1Y
19
2A
2 2Y
18
3A
3 3Y
13
4A
8 4Y
12
5A
9 5Y
11
6A
10 6Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1995, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1

CDC203
CDC203
3.3-V HEX INVERTER/CLOCK DRIVER
SCAS324A OCTOBER 1989 REVISED NOVEMBER 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±150 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
For more information, refer to the Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS Technology
Data Book, literature number SCBD002B.
recommended operating conditions
VCC
VIH
Supply voltage
High-level input voltage
VIL Low-level input voltage
VI Input voltage
VO Output voltage
IOH High-level output current
IOL
t / v
fclock
TA
Low-level output current
Input transition rise or fall rate
Input clock frequency
Operating free-air temperature
VCC = 3 V
VCC = 3.6 V
VCC = 3 V
VCC = 3.6 V
VCC = 3 V
VCC = 3.6 V
VCC = 3 V
VCC = 3.6 V
MIN NOM MAX UNIT
3 3.3 3.6 V
2.1
V
2.5
0.9
V
1.1
0 VCC V
0 VCC V
12
mA
12
12
mA
12
0 10 ns / V
40 MHz
25 70 °C
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Features CDC203 3.3-V HEX INVERTER/CLOCK DRIVER D Replaces 74AC11203 D Low-Skew Propaga tion Delay Specifications for Clock Dri ver Applications D Operates at 3.3-V VC C D Flow-Through Architecture Optimizes PCB Layout D Center-Pin VCC and GND Pi n Configurations Minimize High-Speed Sw itching Noise D EPIC (Enhanced-Perfo rmance Implanted CMOS) 1-µm Process D 500-mA Typical Latch-Up Immunity at 125 °C D Packaged in Plastic Small-Outline Package SCAS324A – OCTOBER 1989 – REVISED NOVEMBER 1995 DW PACKAGE (TOP VIEW) 1Y 2Y 3Y GND GND GND GND 4Y 5Y 6 Y 1 2 3 4 5 6 7 8 9 10 20 1A 19 2A 18 3A 17 NC 16 VCC 15 VCC 14 NC 13 4A 12 5A 11 6A NC – No internal connection description The CDC203 contains six i ndependent inverters. The device perfor ms the Boolean function Y = A. It is de signed specifically for applications re quiring low skew between switching outp uts. The CDC203 is characterized for op eration from 25°C to 70°C. FUNCTION TABLE INPUT A OUTPUT Y HL LH logic symbol† 20 1A 19 2A 18 3A 13 4A 12 .
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