UC1825-SP CONTROLLER Datasheet

UC1825-SP Datasheet, PDF, Equivalent


Part Number

UC1825-SP

Description

HIGH-SPEED PWM CONTROLLER

Manufacture

etcTI

Total Page 18 Pages
Datasheet
Download UC1825-SP Datasheet


UC1825-SP
UC1825-SP
www.ti.com
SLUS870A – JANUARY 2009 – REVISED MARCH 2012
RAD-TOLERANT CLASS V, HIGH-SPEED PWM CONTROLLER
Check for Samples: UC1825-SP
FEATURES
1
• QML-V Qualified, SMD 5962-87681
• Rad-Tolerant: 30 kRad (Si) TID (1)
• Compatible With Voltage- or Current-Mode
Topologies
• Practical Operation Switching Frequencies to
1 MHz
• 50-ns Propagation Delay-to-Output
• High-Current Dual Totem Pole Outputs
(1.5 A Peak)
• Wide Bandwidth Error Amplifier
• Fully Latched Logic With Double-Pulse
Suppression
• Pulse-by-Pulse Current Limiting
• Soft Start/Maximum Duty-Cycle Control
• Undervoltage Lockout With Hysteresis
• Low Start-Up Current (1.1 mA)
(1) Radiation tolerance is a typical value based upon initial device
qualification with dose rate = 10 mrad/sec. Radiation Lot
Acceptance Testing is available - contact factory for details.
DESCRIPTION
The UC1825 PWM control device is optimized for
high-frequency switched mode power supply
applications. Particular care was given to minimizing
propagation delays through the comparators and
logic circuitry while maximizing bandwidth and slew
rate of the error amplifier. This controller is designed
for use in either current-mode or voltage mode
systems with the capability for input voltage feed-
forward.
Protection circuitry includes a current limit comparator
with a 1-V threshold, a TTL compatible shutdown
port, and a soft start pin which will double as a
maximum duty-cycle clamp. The logic is fully latched
to provide jitter-free operation and prohibit multiple
pulses at an output. An undervoltage lockout section
with 800 mV of hysteresis assures low start up
current. During undervoltage lockout, the outputs are
high impedance.
This device features totem pole outputs designed to
source and sink high peak currents from capacitive
loads, such as the gate of a power MOSFET. The on
state is designed as a high level.
Figure 1. BLOCK DIAGRAM
CLOCK 4
RT 5
CT 6
RAMP 7
E/A Out 3
Error
Amp
NI 2
INV 1
1.25 V
OSC
Wide Bandwidth
Error Amp.
+
Inhibit
PWM Latch
(Set Dom.)
R
S
VIN
9 µA
Toggler F/F
Soft Start 8
ILIM / SD 9
1V
1.4 V
ILIM
CPRTR
Shutdown
CPRTR
T
13 Vc
11 Out A
14 Out B
12 Pwr GND
VCC 15
GND 10
9V
UVLO
VCC Good
Gate REF
Gen
Internal
Bias
4V
Output
Inhibit
VREF Good
16 VREF
VDG−92032−2
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2012, Texas Instruments Incorporated

UC1825-SP
UC1825-SP
SLUS870A – JANUARY 2009 – REVISED MARCH 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
TA
–55°C to 125°C
Table 1. ORDERING INFORMATION(1)
PACKAGE (2)
ORDERABLE PART NUMBER
CDIP – J
5962-8768104VEA
LCCC – FK
5962-8768104V2A
TOP-SIDE MARKING
UC1825J-SP
UC1825FK-SP
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
2 Submit Documentation Feedback
Copyright © 2009–2012, Texas Instruments Incorporated
Product Folder Link(s): UC1825-SP


Features UC1825-SP www.ti.com SLUS870A – JANU ARY 2009 – REVISED MARCH 2012 RAD-TO LERANT CLASS V, HIGH-SPEED PWM CONTROLL ER Check for Samples: UC1825-SP FEATUR ES 1 • QML-V Qualified, SMD 5962-8768 1 • Rad-Tolerant: 30 kRad (Si) TID (1 ) • Compatible With Voltage- or Curre nt-Mode Topologies • Practical Operat ion Switching Frequencies to 1 MHz • 50-ns Propagation Delay-to-Output • H igh-Current Dual Totem Pole Outputs (1. 5 A Peak) • Wide Bandwidth Error Ampl ifier • Fully Latched Logic With Doub le-Pulse Suppression • Pulse-by-Pulse Current Limiting • Soft Start/Maximu m Duty-Cycle Control • Undervoltage L ockout With Hysteresis • Low Start-Up Current (1.1 mA) (1) Radiation toleran ce is a typical value based upon initia l device qualification with dose rate = 10 mrad/sec. Radiation Lot Acceptance Testing is available - contact factory for details. DESCRIPTION The UC1825 PW M control device is optimized for high- frequency switched mode power supply applications. Particular care was given to minimizing .
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