2:4 3.3V PCIe Gen1-5 Clock Mux
2:4 3.3V PCIe Gen1–5 Clock Mux 9DML0441 / 9DML0451
DATASHEET
Description
The 9DML0441 and 9DML0451 devices are 3.3V me...
Description
2:4 3.3V PCIe Gen1–5 Clock Mux 9DML0441 / 9DML0451
DATASHEET
Description
The 9DML0441 and 9DML0451 devices are 3.3V members of IDT's Full-Featured PCIe family. They support PCIe Gen1–5 Common Clocked (CC), Separate Reference no Spread (SRnS), and Separate Reference Independent Spread (SRIS) architectures. The parts provide a choice of asynchronous or glitch-free, gapped-clock switching modes, and offer a choice of integrated output terminations for direct connection to 85Ω or 100Ω transmission lines.
Typical Applications
Servers ATE Storage Master/Slave applications
Output Features
Four 1–200MHz Low-Power HCSL (LP-HCSL) DIF pairs 9DML0441 default ZOUT = 100 9DML0451 default ZOUT = 85 See AN-891 for easy termination to other logic levels
Features
Direct connection to 100 (xx41) or 85 (xx51)
transmission lines saves up to 16 resistors
79mW typical power consumption Spread Spectrum Clocking (SSC) compatible OE# pins for each output HCSL-compatible differential inputs Selectable asynchronous or glitch-free, gapped-clock
switching; allows the mux to be selected at power up even if both inputs are not running, then transition to glitch-free switching mode
Space saving 4 × 4 mm 24-VFQFPN Contact factory for customized versions
Key Specifications
PCIe Gen1–5 CC support PCIe Gen1–5 SRIS support Output-to-output skew < 50ps PCIe Gen5 additive jitter (CC) is < 0.06 ps rms 12kHz–20MHz additive phase jitter 285fs rms typical
at156.25MHz
Bl...
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