9FGV0631C

6-Output Very Low-Power PCIe Gen 1-2-3-4 Clock Generator 9FGV0631C DATASHEET Description The 9FGV0631C is a member of IDT's SOC-Friendly 1.8V very low-power PCIe clock family. The device has 6 output enables for clock management, 2 different spread spectrum levels in addition to spread off, and 2 selectable SMBus addresses. Typical Applications PCIe Gen1–4 clock generation for Riser Cards, Storage, Networking, JBOD, Communications, Access Points Output Features 6 100MHz Low-Power (LP) HCSL DIF pairs 1 1.8V LVCMOS REF output w/Wake-On-LAN (WOL) support Key Specifications DIF cycle-to-cycle jitter <50ps DIF output-to-output skew <50ps DIF phase jitter is PCIe Gen1-2-3-4 compliant REF phase jitter is < 1.5ps RMS Block Diagram Features LP-HCSL outputs; save 12 resistors compared to standard PCIe devices 54mW typical power consumption; reduced thermal concerns Outputs can optionally be supplied from any voltage between 1.05V and 1.8V; maximum power savings OE# pins; support DIF power management Programmable slew rate for each output; allows tuning for various line lengths Programmable output amplitude; allows tuning for various application environments DIF outputs blocked until PLL is locked; clean system start-up Selectable 0%, -0.25% or -0.5% spread on DIF outputs; reduces EMI External 25MHz crystal; supports tight ppm with 0 ppm synthesis error Configuration can be accomplished with strapping pins; SMBus interface not required for device contr...