AONV070V65G1 Transistor Datasheet

AONV070V65G1 Datasheet, PDF, Equivalent


Part Number

AONV070V65G1

Description

650V Enhancement Mode GaN Transistor

Manufacture

Alpha & Omega Semiconductors

Total Page 9 Pages
Datasheet
Download AONV070V65G1 Datasheet


AONV070V65G1
AONV070V65G1
650V Enhancement Mode GaN Transistor
Features
650V Enhancement Mode GaN Transistor
Normal-off Design
Ultra-low Qg
No Qrr
Low Inductance
Applications
Server Power Supplies
High-Frequency Converters
Resonant Topologies
Product Summary
VDS @ TJ, max
IDM
RDS(ON)
Qg, typ
Eoss @ 400V
650V
45A
70m
6.9nC
6µJ
Pin Configuration and Pin Names
DFN 8x8
Top View
Bottom View
Pin Names
Gate
Drain
Kelvin Source
Source
Thermal Pad
(Connected to Source)
8
1, 2, 3, 4
7
5, 6
TP
D
1, 2, 3, 4
8
G
SK
7
5, 6
S
Absolute Maximum Ratings
Exceeding the Absolute Maximum Ratings may damage the device. TA = 25°C, unless otherwise stated.
Symbol
Parameter
Maximum
VDS Drain-Source Voltage
VGS
ID
PD
TJ, TSTG
TL
Gate-Source Voltage
Continuous Drain Current
Power Dissipation(2)
Junction and Storage Temperature Range
Maximum Lead and Temperature for Soldering
TA = 25°C
TA = 100°C
Derate above 25°C
650 (DC)
720 (AC)
+6 / -4 (DC)
+10 / -10 (AC)
16(1)
12(1)
125
-55 to 150
260
Thermal Characteristics
Symbol
RJC
RJA
Parameter
Maximum Junction-to-Case
Maximum Junction-to-Ambient(3)
Maximum
1
65
Units
V
V
A
W
°C
°C
Units
°C/W
°C/W
Rev. 1.2 May 2019
www.aosmd.com
Page 1 of 9

AONV070V65G1
AONV070V65G1
Electrical Characteristics
TA = 25 °C, VIN = V, unless otherwise specified.
Symbol
Parameter
Conditions
Min Typ Max Units
STATIC
VDS(max) Drain-Source Voltage
IDSS Zero Gate Voltage Drain Current
IGSS
VGS(th)
Gate-Source Leakage Current
Gate Threshold Voltage
RDS(ON) Static Drain-Source On-Resistance
VSD Diode Forward Voltage
DYNAMIC
DC static VDS(max)
AC transient VDS(max)
650
V
720
VDS=650V, VGS=0V
0.5
µA
TJ=150°C
5
VDS=0V, VGS=6V
100 µA
VDS=5V, ID=5mA
1.1 1.8 2.3
V
VGS=6V, ID=6A
TJ = 150°C
70 90
m
165
IS=10A,VGS=0V
2.3 V
Ciss
Coss
Co(er)
Co(tr)
Input Capacitance
Output Capacitance
Effective Output Capacitance,
Energy Related(4)
Effective Output Capacitance,
Time Related(5)
VGS=0V, VDS=400V, f=1MHz
VGS=0V, VDS=0 to 400V, f=1MHz
203 pF
58 pF
74 pF
105 pF
Crss Reverse Transfer Capacitance
Rg Gate Resistance
SWITCHING
VGS=0V, VDS=400V, f=1MHz
f=1MHz
1.5 pF
10
Qg
Qgs
Qgd
tD(on)
tr
tD(off)
tf
Qrr
Qoss
Total Gate Charge
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
Body Diode Reverse Recovery Charge
Output Charge
VGS=6V, VDS=400V, ID=6A
VGS=-3V/+6V, VDS=400V, ID=6A,
RG,ON=4.7, RG,OFF=1
IF=6A, dI/dt=100A/ms, VDS=400V
IF=6A, dI/dt=100A/ms, VDS=400V
6.9 nC
2 nC
1.4 nC
2.4 ns
5.4 ns
6.2 ns
14.2 ns
0 nC
42 nC
Notes:
1. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C, Ratings are based on low frequency and duty cycles to keep initial TJ
=25°C.
2. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipa-
tion limit for cases where additional heatsinking is used.
3. The value of R JA is measured with the device in a still air environment with T A =25°C.
4. Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% V(BR)DSS.
5. Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% V(BR)DSS
6. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of TJ(MAX)=150°C.
7. The static characteristics in Figures 1 to 7 are obtained using <300ms pulses, duty cycle 0.5% max.
Rev. 1.2 May 2019
www.aosmd.com
Page 2 of 9


Features AONV070V65G1 650V Enhancement Mode GaN T ransistor Features  650V Enhancemen t Mode GaN Transistor  Normal-off De sign  Ultra-low Qg  No Qrr  Lo w Inductance Applications  Server Po wer Supplies  High-Frequency Convert ers  Resonant Topologies Product Su mmary VDS @ TJ, max IDM RDS(ON) Qg, typ Eoss @ 400V 650V 45A 70mΩ 6.9nC 6µ J Pin Configuration and Pin Names DFN 8x8 Top View Bottom View Pin Names Gate Drain Kelvin Source Source Therma l Pad (Connected to Source) 8 1, 2, 3, 4 7 5, 6 TP D 1, 2, 3, 4 8 G SK 7 5 , 6 S Absolute Maximum Ratings Exceedi ng the Absolute Maximum Ratings may dam age the device. TA = 25°C, unless othe rwise stated. Symbol Parameter Maxim um VDS Drain-Source Voltage VGS ID PD TJ, TSTG TL Gate-Source Voltage Conti nuous Drain Current Power Dissipation(2 ) Junction and Storage Temperature Rang e Maximum Lead and Temperature for Sold ering TA = 25°C TA = 100°C Derate ab ove 25°C 650 (DC) 720 (AC) +6 / -4 (DC) +10 / -10 (AC) 16(1) 12(1) 125 -55 to 150 26.
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