MC9S08PA4 CPU Datasheet

MC9S08PA4 Datasheet, PDF, Equivalent


Part Number

MC9S08PA4

Description

CPU

Manufacture

NXP

Total Page 29 Pages
Datasheet
Download MC9S08PA4 Datasheet


MC9S08PA4
NXP Semiconductors
Data Sheet: Technical Data
MC9S08PA4 Data Sheet
Supports: MC9S08PA4(A)
Key features
• 8-Bit S08 central processor unit (CPU)
– Up to 20 MHz bus at 2.7 V to 5.5 V across operating
temperature range
– Supporting up to 40 interrupt/reset sources
– Supporting up to four-level nested interrupt
– On-chip memory
– Up to 4 KB flash read/program/erase over full
operating voltage and temperature
– Up to 128 byte EEPROM; 2-byte erase sector;
program and erase while executing flash
– Up to 512 byte random-access memory (RAM)
– Flash and RAM access protection
• Power-saving modes
– One low-power stop mode; reduced power wait
mode
– Peripheral clock enable register can disable clocks to
unused modules, reducing currents; allows clocks to
remain enabled to specific peripherals in stop3 mode
• Clocks
– Oscillator (XOSC) - loop-controlled Pierce
oscillator; crystal or ceramic resonator range of
31.25 kHz to 39.0625 kHz or 4 MHz to 20 MHz
– Internal clock source (ICS) - containing a frequency-
locked-loop (FLL) controlled by internal or external
reference; precision trimming of internal reference
allowing 1% deviation across temperature range of 0
°C to 70 °C and 2% deviation across whole
operating temperature range; up to 20 MHz
• System protection
– Watchdog with independent clock source
– Low-voltage detection with reset or interrupt;
selectable trip points
– Illegal opcode detection with reset
– Illegal address detection with reset
Document Number MC9S08PA4
Rev. 9, 01/2019
MC9S08PA4
• Development support
– Single-wire background debug interface
– Breakpoint capability to allow three breakpoints
setting during in-circuit debugging
– On-chip in-circuit emulator (ICE) debug module
containing two comparators and nine trigger modes
• Peripherals
– ACMP - one analog comparator with both positive
and negative inputs; separately selectable interrupt
on rising and falling comparator output; filtering
– ADC - 8-channel, 12-bit resolution; 2.5 µs
conversion time; data buffers with optional
watermark; automatic compare function; internal
bandgap reference channel; operation in stop mode;
optional hardware trigger
– FTM - Three 2-channel flex timer modulators
modules; 16-bit counter; each channel can be
configured for input capture, output compare, edge-
or center-aligned PWM mode
– RTC - 16-bit real timer counter (RTC)
– SCI - one serial communication interface (SCI/
UART) modules optional 13-bit break; full duplex
non-return to zero (NRZ); LIN extension support
• Input/Output
– Up to 18 GPIOs including one output-only pin
– One 8-bit keyboard interrupt module (KBI)
– Two, ultra-high current sink pins supporting 20 mA
source/sink current
• Package options
– 20-pin SOIC
– 20-pin TSSOP
– 16-pin TSSOP
– 8-pin DFN
– 8-pin SOIC
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.

MC9S08PA4
Table of Contents
1 Orderable part numbers........................................................................ 3
5.2.1 Control timing................................................................ 15
2 Part identification................................................................................. 3
5.2.2 Debug trace timing specifications..................................16
2.1 Description...................................................................................3
5.2.3 FTM module timing....................................................... 17
2.2 Format.......................................................................................... 3
5.3 Thermal specifications................................................................. 18
2.3 Fields............................................................................................4
5.3.1 Thermal characteristics.................................................. 18
2.4 Example....................................................................................... 4
6 Peripheral operating requirements and behaviors................................ 19
3 Parameter Classification.......................................................................4
6.1 External oscillator (XOSC) and ICS characteristics....................19
4 Ratings..................................................................................................5
6.2 NVM specifications..................................................................... 20
4.1 Thermal handling ratings............................................................. 5
6.3 Analog..........................................................................................22
4.2 Moisture handling ratings............................................................ 5
6.3.1 ADC characteristics....................................................... 22
4.3 ESD handling ratings................................................................... 5
6.3.2 Analog comparator (ACMP) electricals.........................24
4.4 Voltage and current operating ratings..........................................6
7 Dimensions...........................................................................................25
5 General................................................................................................. 7
7.1 Obtaining package dimensions.................................................... 25
5.1 Nonswitching electrical specifications........................................ 7
8 Pinout................................................................................................... 25
5.1.1 DC characteristics.......................................................... 7
8.1 Signal multiplexing and pin assignments.................................... 25
5.1.2 Supply current characteristics........................................ 13
8.2 Device pin assignment................................................................. 26
5.1.3 EMC performance..........................................................14
9 Revision history....................................................................................27
5.2 Switching specifications.............................................................. 15
MC9S08PA4 Data Sheet, Rev. 9, 01/2019
2 NXP Semiconductors


Features NXP Semiconductors Data Sheet: Technical Data MC9S08PA4 Data Sheet Supports: MC 9S08PA4(A) Key features • 8-Bit S08 c entral processor unit (CPU) – Up to 2 0 MHz bus at 2.7 V to 5.5 V across oper ating temperature range – Supporting up to 40 interrupt/reset sources – Su pporting up to four-level nested interr upt – On-chip memory – Up to 4 KB f lash read/program/erase over full opera ting voltage and temperature – Up to 128 byte EEPROM; 2-byte erase sector; p rogram and erase while executing flash – Up to 512 byte random-access memory (RAM) – Flash and RAM access protect ion • Power-saving modes – One low- power stop mode; reduced power wait mod e – Peripheral clock enable register can disable clocks to unused modules, r educing currents; allows clocks to rema in enabled to specific peripherals in s top3 mode • Clocks – Oscillator (XO SC) - loop-controlled Pierce oscillator ; crystal or ceramic resonator range of 31.25 kHz to 39.0625 kHz or 4 MHz to 20 MHz – Internal clock source (ICS) - containing a f.
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