MCIMX7D3DVK10SD Processors Datasheet

MCIMX7D3DVK10SD Datasheet, PDF, Equivalent


Part Number

MCIMX7D3DVK10SD

Description

Applications Processors

Manufacture

NXP

Total Page 30 Pages
Datasheet
Download MCIMX7D3DVK10SD Datasheet


MCIMX7D3DVK10SD
NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMX7DCEC
Rev. 6, 03/2019
MCIMX7DxDVx1nSD
MCIMX7DxEVx1nSD
i.MX 7Dual Family of
Applications Processors
Datasheet
Package Information
Plastic Package
BGA 12 x 12 mm, 0.4 mm pitch
BGA 19 x 19 mm, 0.75 mm pitch
Ordering Information
See Table 1 on page 3
1 i.MX 7Dual introduction
1 i.MX 7Dual introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
The i.MX 7Dual family of processors represents NXP’s 2 Architectural overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
latest achievement in high-performance processing for
2.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
low-power requirements with a high degree of functional
3
Modules list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1 Special signal considerations . . . . . . . . . . . . . . . . 16
integration. These processors are targeted towards the
3.2 Recommended connections for unused analog
growing market of connected and portable devices.
interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 20
The i.MX 7Dual family of processors features advanced
implementation of the Arm® Cortex®-A7 core, which
4.1 Chip-level conditions . . . . . . . . . . . . . . . . . . . . . . . 20
4.2 Integrated LDO voltage regulator parameters . . . . 40
4.3 PLL electrical characteristics. . . . . . . . . . . . . . . . . 42
operates at speeds of up to 1 GHz and 1.2 GHz,
depending on the part number. The i.MX 7Dual family
4.4 On-chip oscillators. . . . . . . . . . . . . . . . . . . . . . . . . 42
4.5 I/O DC parameters . . . . . . . . . . . . . . . . . . . . . . . . 43
4.6 I/O AC parameters . . . . . . . . . . . . . . . . . . . . . . . . 47
provides up to 32-bit
DDR3/DDR3L/LPDDR2/LPDDR3-1066 memory
interface and a number of other interfaces for connecting
4.7 Output buffer impedance parameters . . . . . . . . . . 51
4.8 System modules timing . . . . . . . . . . . . . . . . . . . . . 53
4.9 General-purpose media interface (GPMI) timing. . 73
4.10 External peripheral interface parameters . . . . . . . 81
peripherals, such as WLAN, Bluetooth, GPS, displays,
and camera sensors.
4.11 12-Bit A/D converter (ADC) . . . . . . . . . . . . . . . . . 118
5 Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 119
5.1 Boot mode configuration pins . . . . . . . . . . . . . . . 119
5.2 Boot device interface allocation. . . . . . . . . . . . . . 120
6 Package information and contact assignments. . . . . . . 122
6.1 12 x 12 mm package information . . . . . . . . . . . . 122
6.2 19 x 19 mm package information . . . . . . . . . . . . 139
7 Release notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
NXP reserves the right to change the detail specifications as may be required to permit improvements in the design of
its products.
© 2016, 2017, 2019 NXP B.V.

MCIMX7D3DVK10SD
i.MX 7Dual introduction
The i.MX 7Dual family of processors is specifically useful for applications such as:
• Audio
• Connected devices
• Access control panels
• Human-machine interfaces (HMI)
• Portable medical and health care
• IP phones
• Smart appliances
• Point of Sale
• eReaders
• Wearables
• Home energy management systems
The features of the i.MX 7Dual family of processors include the following:
• Arm Cortex-A7 plus Arm Cortex-M4—Heterogeneous Multicore Processing architecture enables
the device to run an open operating system like Linux/Android on the Cortex-A7 core and an RTOS
like FreeRTOS™ on the Cortex-M4 core.
• Two Arm Cortex-A7 cores—The processor enhances the capabilities of portable, connected
applications by fulfilling the ever-increasing MIPS needs of operating systems and applications at
lowest power consumption levels per MHz.
• Multilevel memory system—The multilevel Cortex-A7 memory system is based on the L1
instruction and data caches, L2 cache, and internal and external memory. The processor supports
many types of external memory devices, including DDR3, DDR3L, LPDDR2 and LPDDR3, NOR
Flash, NAND Flash (MLC and SLC), QSPI Flash, and managed NAND, including eMMC rev.
• Power efficiency—Power management implemented throughout the IC enables features and
peripherals to consume minimum power in both active and various low-power modes.
• Multimedia—The multimedia performance is enhanced by a multilevel cache system, NEON™
MPE (Media Processor Engine) coprocessor, a programmable smart DMA (SDMA) controller.
• Up to two Gigabit Ethernet with AVB—10/100/1000 Mbps Ethernet controllers supporting IEEE
Std 1588 time synchronization.
• Electronic Paper Display Controller (EPDC)—The processor integrates an EPD controller that
supports E Ink® color and monochrome panels with up to 2048 x 1536 resolution at 106 Hz
refresh, 4096 x 4096 resolution at 20 Hz refresh, and 5-bit grayscale (32-levels per color channel).
• Human-machine interface (HMI)—i.MX 7Dual processor provides up to two separate display
interfaces (parallel display and two-lane MIPI-DSI), CMOS sensor interface (two-lane MIPI-CSI
and parallel).
• Interface flexibility—i.MX 7Dual processor supports connections to a variety of interfaces: two
high-speed USB on-the-go modules with PHY, High-Speed Inter-Chip USB, multiple expansion
card ports (high-speed MMC/SDIO host and other), two Gigabit Ethernet controllers with support
for Ethernet AVB, PCIe-II, two 12-bit ADCs with a total of 8 single-ended inputs, two CAN ports,
and a variety of other popular interfaces (such as UART, I2C, and I2S).
i.MX 7Dual Family of Applications Processors Datasheet, Rev. 6, 02/2019
2 NXP Semiconductors


Features NXP Semiconductors Data Sheet: Technical Data Document Number: IMX7DCEC Rev. 6 , 03/2019 MCIMX7DxDVx1nSD MCIMX7DxEVx1n SD i.MX 7Dual Family of Applications P rocessors Datasheet Package Informatio n Plastic Package BGA 12 x 12 mm, 0.4 m m pitch BGA 19 x 19 mm, 0.75 mm pitch O rdering Information See Table 1 on page 3 1 i.MX 7Dual introduction 1 i.MX 7 Dual introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Fe atures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 The i.MX 7Dual family of processors repres ents NXP’s 2 Architectural overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 latest achievement in high-performance processing for 2.1 B lock diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 low- power requirements with a high degree o f functional 3 Modules list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 .
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