CD74HCT158 Multiplexers Datasheet

CD74HCT158 Datasheet, PDF, Equivalent


Part Number

CD74HCT158

Description

Quad 2-Input Multiplexers

Manufacture

etcTI

Total Page 16 Pages
Datasheet
Download CD74HCT158 Datasheet


CD74HCT158
The CD54HC158 and
CD54/74HC157, CD54/74HCT157,
CD74HC158 are obsolete and
CD54/74HC158, CD54/74HCT158no longer are supplied.
Data sheet acquired from Harris Semiconductor
SCHS153C
September 1997 - Revised October 2003
High-Speed CMOS Logic
Quad 2-Input Multiplexers
[ /Title
(CD74H
C157,
CD74H
CT157,
CD74H
C158,
CD74H
CT158)
/Subject
(High
Speed
Features
Description
• Common Select Inputs
• Separate Enable Inputs
• Buffered inputs and Outputs
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
The ’HC157, ’HCT157, ’HC158, and ’HCT158 are quad 2-
input multiplexers which select four bits of data from two
sources under the control of a common Select input (S). The
Enable input (E) is active Low. When (E) is High, all of the
outputs in the 158, the inverting type, (1Y-4Y) are forced
High and in the 157, the non-inverting type, all of the outputs
(1Y-4Y) are forced Low, regardless of all other input
conditions.
Moving data from two groups of registers to four common
output buses is a common use of these devices. The state of
the Select input determines the particular register from
which the data comes. They can also be used as function
generators.
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at
VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
Ordering Information
PART NUMBER
CD54HC157F3A
CD54HCT157F3A
CD54HCT158F3A
CD74HC157E
TEMP. RANGE
(oC)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
Pinout
CD54HC157, CD54HCT157, CD54HC158, CD54HCT158
(CERDIP)
CD74HC157, CD74HCT157, CD74HC158
(PDIP, SOIC)
CD74HCT158
(PDIP)
TOP VIEW
S1
1I0 2
1I1 3
1Y 4
2I0 5
2I1 6
2Y 7
GND 8
16 VCC
15 E
14 4I0
13 4I1
12 4Y
11 3I0
10 3I1
9 3Y
CD74HC157M
-55 to 125
16 Ld SOIC
CD74HC157MT
-55 to 125
16 Ld SOIC
CD74HC157M96
-55 to 125
16 Ld SOIC
CD74HCT157E
-55 to 125
16 Ld PDIP
CD74HCT157M
-55 to 125
16 Ld SOIC
CD74HCT157MT
-55 to 125
16 Ld SOIC
CD74HCT157M96
-55 to 125
16 Ld SOIC
CD74HCT158E
-55 to 125
16 Ld PDIP
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1

CD74HCT158
CD54/74HC157, CD54/74HCT157, CD54/74HC158, CD54/74HCT158
Functional Diagram
2
1I0
3
1I1
2I0 5
6
2I1
11
3I0
10
3I1
14
4I0
13
4I1
S
E
1 15
HC/HCT HC/HCT
157 158
4
1Y
1Y
7
2Y
2Y
9
3Y
3Y
12
4Y
4Y
TRUTH TABLE
SELECT
ENABLE INPUT
DATA INPUTS
OUTPUT
157 158
E S I0 I1 Y Y
HXXX L H
L L LXLH
L LHXHL
LHXL LH
L HXHH L
H = High Voltage Level, L = Low Voltage Level, X = Don’t Care
2


Features .
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