CD54HCT153 Selector/Multiplexer Datasheet

CD54HCT153 Datasheet, PDF, Equivalent


Part Number

CD54HCT153

Description

Dual 4- to 1-Line Selector/Multiplexer

Manufacture

etcTI

Total Page 14 Pages
Datasheet
Download CD54HCT153 Datasheet


CD54HCT153
Data sheet acquired from Harris Semiconductor
SCHS151C
September 1997 - Revised October 2003
CD54HC153, CD74HC153,
CD54HCT153, CD74HCT153
High-Speed CMOS Logic
Dual 4- to 1-Line Selector/Multiplexer
[ /Title
(CD74H
C153,
CD74H
CT153)
/Subject
(High
Speed
CMOS
Logic
Dual 4-
Input
Features
Description
• Common Select Inputs
• Separate Enable Inputs
• Buffered inputs and Outputs
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at
VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
The ’HC153 and ’HCT153 are dual 4- to 1-line
selector/multiplexers that select one of four sources for each
section by the common select inputs, S0 and S1. When the
enable inputs (1E, 2E) are HIGH, the outputs are in the LOW
state.
Ordering Information
PART NUMBER
CD54HC153F3A
CD54HCT153F3A
CD74HC153E
CD74HC153M
CD74HC153MT
CD74HC153M96
CD74HCT153E
CD74HCT153M
CD74HCT153MT
CD74HCT153M96
TEMP. RANGE
(oC)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel
of 250.
Pinout
CD54HC153, CD54HCT153
(CERDIP)
CD74HC153, CD74HCT153
(PDIP, SOIC)
TOP VIEW
1E 1
S1 2
1I3 3
1I2 4
1I1 5
1I0 6
1Y 7
GND 8
16 VCC
15 2E
14 S0
13 2I3
12 2I2
11 2I1
10 2I0
9 2Y
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1

CD54HCT153
CD54HC153, CD74HC153, CD54HCT153, CD74HCT153
Functional Diagram
1
1E
6
1I0
5
1I1
4
1I2
3
1I3
14
S0
2
S1
10
2I0
11
2I1
12
2I2
13
2I3
15
2E
SEL/MUX
SEL/MUX
7
1Y
9
2Y
GND = 8
VCC = 16
TRUTH TABLE
SELECT INPUTS
DATA INPUTS
S1 S0
I0
I1
I2
I3
XXXXXX
L L LXXX
L LHXXX
L HX L XX
LHXHXX
HLXXLX
H L XXHX
HHXXX L
HHXXXH
H = High Voltage Level, L = Low Voltage Level, X = Don’t Care
NOTE: Select inputs S1 and S0 are common to both sections.
ENABLE OUTPUT
EY
HL
LL
LH
LL
LH
LL
LH
LL
LH
2


Features Data sheet acquired from Harris Semicond uctor SCHS151C September 1997 - Revised October 2003 CD54HC153, CD74HC153, CD 54HCT153, CD74HCT153 High-Speed CMOS Lo gic Dual 4- to 1-Line Selector/Multiple xer [ /Title (CD74H C153, CD74H CT153) /Subject (High Speed CMOS Logic Dual 4 Input Features Description • Commo n Select Inputs • Separate Enable Inp uts • Buffered inputs and Outputs • Fanout (Over Temperature Range) - Stan dard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loa ds • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Prop agation Delay and Transition Times • Significant Power Reduction Compared t o LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30%of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - D irect LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH The ’HC153 and ’HCT153 are dual 4- to 1-.
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