CD74HCT139 Decoder/Demultiplexer Datasheet

CD74HCT139 Datasheet, PDF, Equivalent


Part Number

CD74HCT139

Description

Dual 2- to 4-Line Decoder/Demultiplexer

Manufacture

etcTI

Total Page 14 Pages
Datasheet
Download CD74HCT139 Datasheet


CD74HCT139
Data sheet acquired from Harris Semiconductor
SCHS148D
September 1997 - Revised October 2003
CD54HC139, CD74HC139,
CD54HCT139, CD74HCT139
High-Speed CMOS Logic
Dual 2- to 4-Line Decoder/Demultiplexer
[ /Title
(CD74
HC139
,
CD74
HCT13
9)
/Sub-
ject
(High
Speed
CMOS
Logic
Dual
2-to-4
Line
Decod
Features
• Multifunction Capability
- Binary to 1 of 4 Decoders or 1 to 4 Line
Demultiplexer
• Active Low Mutually Exclusive Outputs
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at
VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
• Memory Decoding, Data Routing, Code Conversion
Description
The ’HC139 and ’HCT139 devices contain two independent
binary to one of four decoders each with a single active low
enable input (1E or 2E). Data on the select inputs (1A0 and
1A1 or 2A0 and 2A1) cause one of the four normally high
outputs to go low.
If the enable input is high all four outputs remain high. For
demultiplexer operation the enable input is the data input.
The enable input also functions as a chip select when these
devices are cascaded. This device is functionally the same
as the CD4556B and is pin compatible with it.
The outputs of these devices can drive 10 low power
Schottky TTL equivalent loads. The HCT logic family is
functionally as well as pin equivalent to the LS logic family.
Ordering Information
PART NUMBER
CD54HC139F3A
CD54HCT139F3A
CD74HC139E
CD74HC139M
CD74HC139MT
TEMP. RANGE
(oC)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
CD74HC139M96
-55 to 125
16 Ld SOIC
CD74HCT139E
-55 to 125
16 Ld PDIP
CD74HCT139M
-55 to 125
16 Ld SOIC
Pinout
CD74HCT139MT
-55 to 125
16 Ld SOIC
CD54HC139, CD54HCT139
(CERDIP)
CD74HC139, CD74HCT139
(PDIP, SOIC)
TOP VIEW
CD74HCT139M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
1E 1
1A0 2
1A1 3
1Y0 4
1Y1 5
1Y2 6
1Y3 7
GND 8
16 VCC
15 2E
14 2A0
13 2A1
12 2Y0
11 2Y1
10 2Y2
9 2Y3
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1

CD74HCT139
CD54HC139, CD74HC139, CD54HCT139, CD74HCT139
Functional Diagram
2 (14)
A0
3 (13)
A1
1 (15)
E
4 (12)
Y0
5 (11)
Y1
6 (10)
Y2
7 (9)
Y3
Logic Diagram
TRUTH TABLE
INPUTS ENABLE SELECT
OUTPUTS
E A1 A0 Y3 Y2 Y1
000111
001110
010101
011011
1XX1 1 1
X = Don’t Care, Logic 1 = High, Logic 0 = Low
Y0
0
1
1
1
1
2 (14)
A0
3 (13)
A1
1 (15)
E
4 (12)
Y0
5 (11)
Y1
6 (10)
Y2
7 (9)
Y3
2


Features Data sheet acquired from Harris Semicond uctor SCHS148D September 1997 - Revised October 2003 CD54HC139, CD74HC139, CD 54HCT139, CD74HCT139 High-Speed CMOS Lo gic Dual 2- to 4-Line Decoder/Demultipl exer [ /Title (CD74 HC139 , CD74 HCT13 9) /Subject (High Speed CMOS Logic Dua l 2-to-4 Line Decod Features • Multi function Capability - Binary to 1 of 4 Decoders or 1 to 4 Line Demultiplexer Active Low Mutually Exclusive Output s • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Ou tputs . . . . . . . . . . . . . 15 LSTT L Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compa red to LSTTL Logic ICs • HC Types - 2 V to 6V Operation - High Noise Immunity : NIL = 30%, NIH = 30%of VCC at VCC = 5 V • HCT Types - 4.5V to 5.5V Operatio n - Direct LSTTL Input Logic Compatibil ity, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL,.
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