5P49V5944 Generator Datasheet

5P49V5944 Datasheet, PDF, Equivalent


Part Number

5P49V5944

Description

Programmable Clock Generator

Manufacture

Renesas

Total Page 30 Pages
Datasheet
Download 5P49V5944 Datasheet


5P49V5944
Programmable Clock Generator
5P49V5944
Description
The 5P49V5944 is a programmable clock generator intended
for high-performance consumer, networking, industrial,
computing, and data-communications applications.
Configurations may be stored in on-chip One-Time
Programmable (OTP) memory or changed using I2C
interface. This is IDTs fifth generation of programmable clock
technology (VersaClock® 5).
The frequencies are generated from a single reference clock.
The input reference can be either a crystal or an LVCMOS
reference clock.
Two select pins allow up to 4 different configurations to be
programmed and accessible using processor GPIOs or
bootstrapping. The different selections may be used for
different operating modes (full function, partial function, partial
power-down), regional standards (US, Japan, Europe) or
system production margin testing.
The device may be configured to use one of two I2C
addresses to allow multiple devices to be used in a system.
Pin Assignment
XOUT
XIN/REF
VDDA
GND
SD/OE
20 19 18 17 16
1 15
2 14
3
EPAD
13
4 12
5 11
6 7 8 9 10
VDDO1
OUT1
OUT1B
GND
GND
3 × 3 mm 20-VFQFPN
DATASHEET
Features
Generates up to two independent output frequencies
High-performance, low phase noise PLL, < 0.7ps RMS
typical phase jitter on outputs:
– PCIe Gen1–3 compliant clock capability
– USB 3.0 compliant clock capability
– 1 GbE and 10 GbE
Two fractional output dividers (FODs)
Independent spread spectrum capability on each output
pair
Four banks of internal non-volatile in-system
programmable or factory programmable OTP memory
I2C serial programming interface
One reference LVCMOS output clock
Two universal output pairs:
– Each configurable as one differential output pair or two
LVCMOS outputs
I/O standards:
– Single-ended I/Os: 1.8V to 3.3V LVCMOS
– Differential I/Os: LVPECL, LVDS and HCSL
Input frequency ranges:
– LVCMOS reference clock input (XIN/REF): 1MHz to
200MHz
– Crystal frequency range: 8MHz to 40MHz
Output frequency ranges:
– LVCMOS clock outputs: 1MHz to 200MHz
– LVDS, LVPECL, HCSL differential clock outputs: 1MHz
to 350MHz
Individually selectable output voltage (1.8V, 2.5V, 3.3V) for
each output pair
Programmable loop bandwidth
Programmable output to output skew
Programmable slew rate control
Programmable crystal load capacitance
Individual output enable/disable
Power-down mode
1.8V, 2.5V or 3.3V core VDDD, VDDA
3 x 3 mm 20-VFQFPN package
-40° to +85°C industrial temperature operation
5P49V5944 JULY 10, 2019
1

5P49V5944
5P49V5944 DATASHEET
Functional Block Diagram
XIN/REF
XOUT
SD/OE
SEL1/SDA
SEL0/SCL
VDDA
VDDD
OTP
and
Control Logic
PLL
Applications
Ethernet switch/router
PCI Express 1.0/2.0/3.0
Broadcast video/audio timing
Multi-function printer
Processor and FPGA clocking
Any-frequency clock conversion
MSAN/DSLAM/PON
Fiber channel, SAN
Telecom line cards
1 GbE and 10 GbE
FOD1
FOD2
VDDO0
OUT0_SEL_I2CB
VDDO1
OUT1
OUT1B
VDDO2
OUT2
OUT2B
PROGRAMMABLE CLOCK GENERATOR
2
JULY 10, 2019


Features Programmable Clock Generator 5P49V5944 Description The 5P49V5944 is a program mable clock generator intended for high -performance consumer, networking, indu strial, computing, and data-communicati ons applications. Configurations may be stored in on-chip One-Time Programmabl e (OTP) memory or changed using I2C int erface. This is IDTs fifth generation o f programmable clock technology (VersaC lock® 5). The frequencies are generate d from a single reference clock. The in put reference can be either a crystal o r an LVCMOS reference clock. Two select pins allow up to 4 different configura tions to be programmed and accessible u sing processor GPIOs or bootstrapping. The different selections may be used fo r different operating modes (full funct ion, partial function, partial power-do wn), regional standards (US, Japan, Eur ope) or system production margin testin g. The device may be configured to use one of two I2C addresses to allow multi ple devices to be used in a system. Pin Assignment OUT0_SEL_I2C.
Keywords 5P49V5944, datasheet, pdf, Renesas, Programmable, Clock, Generator, P49V5944, 49V5944, 9V5944, 5P49V594, 5P49V59, 5P49V5, Equivalent, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)