SN74HC02-EP GATE Datasheet

SN74HC02-EP Datasheet, PDF, Equivalent


Part Number

SN74HC02-EP

Description

QUADRUPLE 2-INPUT POSITIVE-NOR GATE

Manufacture

etcTI

Total Page 11 Pages
Datasheet
Download SN74HC02-EP Datasheet


SN74HC02-EP
SN74HC02ĆEP
QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATE
D Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D Extended Temperature Performance of Up
To −55°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification
D Qualification Pedigree
D 2-V to 6-V VCC Operation
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
SCLS478A − APRIL 2003 − REVISED JANUARY 2004
D Outputs Can Drive Up To 10 LSTTL Loads
D Low Power Consumption, 20-µA Max ICC
D Typical tpd = 8 ns
D ±4-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D OR PW PACKAGE
(TOP VIEW)
1Y
1A
1B
2Y
2A
2B
GND
1
2
3
4
5
6
7
14 VCC
13 4Y
12 4B
11 4A
10 3Y
9 3B
8 3A
description/ordering information
The SN74HC02 contains four independent 2-input NOR gates. It performs the Boolean function
Y = A + B or Y = A B in positive logic.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−40°C to 125°C TSSOP − PW
Tape and reel SN74HC02QPWREP SHC02EP
−55°C to 125°C SOIC − D
Tape and reel SN74HC02MDREP
HC02MEP
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
AB
OUTPUT
Y
HX
L
XH
L
LL
H
logic diagram (positive logic)
A
B
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2004, Texas Instruments Incorporated
1

SN74HC02-EP
SN74HC02ĆEP
QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATE
SCLS478A − APRIL 2003 − REVISED JANUARY 2004
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN NOM MAX UNIT
VCC Supply voltage
VIH High-level input voltage
VIL Low-level input voltage
VI Input voltage
VO Output voltage
t/v Input transition rise/fall time
TA Operating free-air temperature
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
Q-suffix device
M-suffix device
2
1.5
3.15
4.2
0
0
−40
−55
5 6V
V
0.5
1.35
1.8
VCC
VCC
1000
500
400
125
125
V
V
V
ns
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Features SN74HC02ĆEP QUADRUPLE 2ĆINPUT POSITIVE ĆNOR GATE D Controlled Baseline − O ne Assembly/Test Site, One Fabrication Site D Extended Temperature Performance of Up To −55°C to 125°C D Enhanced Diminishing Manufacturing Sources (DMS ) Support D Enhanced Product-Change Not ification D Qualification Pedigree† D 2-V to 6-V VCC Operation † Component qualification in accordance with JEDEC and industry standards to ensure relia ble operation over an extended temperat ure range. This includes, but is not li mited to, Highly Accelerated Stress Tes t (HAST) or biased 85/85, temperature c ycle, autoclave or unbiased HAST, elect romigration, bond intermetallic life, a nd mold compound life. Such qualificati on testing should not be viewed as just ifying use of this component beyond spe cified performance and environmental li mits. SCLS478A − APRIL 2003 − REVI SED JANUARY 2004 D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumpt ion, 20-µA Max ICC D Typical tpd = 8 ns D ±4-mA Output Drive at 5 V D Low Input .
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