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AD2426 Dataheets PDF



Part Number AD2426
Manufacturers Analog Devices
Logo Analog Devices
Description Automotive Audio Bus A2B Transceiver
Datasheet AD2426 DatasheetAD2426 Datasheet (PDF)

Automotive Audio Bus A2B Transceiver AD2420(W)/AD2426(W)/AD2427(W)/AD2428(W)/AD2429(W) A2B BUS FEATURES Line topology Single master, multiple slave Up to 15 m between nodes and up to 40 m overall cable length (see Table 9) Communication over distance Synchronous data Multichannel I2S/TDM to I2S/TDM Synchronous clock, phase aligned in all nodes Low latency slave to slave communication Control and status information I2C to I2C GPIO and interrupt Bus power or local power slave nodes Configurable .

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Automotive Audio Bus A2B Transceiver AD2420(W)/AD2426(W)/AD2427(W)/AD2428(W)/AD2429(W) A2B BUS FEATURES Line topology Single master, multiple slave Up to 15 m between nodes and up to 40 m overall cable length (see Table 9) Communication over distance Synchronous data Multichannel I2S/TDM to I2S/TDM Synchronous clock, phase aligned in all nodes Low latency slave to slave communication Control and status information I2C to I2C GPIO and interrupt Bus power or local power slave nodes Configurable with SigmaStudio graphical software tool AEC-Q100 qualified for automotive applications A2B TRANSCEIVER FEATURES Configurable A2B bus master or slave operation I2C interface 8-bit to 32-bit multichannel I2S/TDM interface Programmable I2S/TDM data rate Up to 32 upstream and 32 downstream channels PDM interface Programmable PDM clock rate Up to 4 high dynamic range microphone inputs Simultaneous reception of I2S data with up to 4 PDM microphones Unique ID register for each transceiver Crossover or straight-through cabling Programmable settings to optimize EMC performance APPLICATIONS Audio communication link Microphone arrays Beamforming Hands free and in car communication Active and road noise cancellation Audio/video conferencing systems IOVDD DVDD PLLVDD SCL SDA IRQ/IO0 I2C ADR1/IO1 ADR2/IO2 PLL DTX0/IO3 DTX1/IO4 DRX0/IO5 DRX1/IO6 I2S/TDM PDM PDMCLK/IO7 BCLK SYNC VOUT1 VIN VOUT2 VREG1 VREG2 VSSN VSS BTRXVDD A2B TRX B (Towards Last Slave) DIAGNOSTICS A2B TRX A (Towards Master) ATRXVDD BP BCM BN SWP SENSE AP ACM AN Figure 1. Functional Block Diagram A2B and the A2B logo are registered trademarks of Analog Devices, Inc. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A. Tel: 781.329.4700 ©2021 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD2420(W)/AD2426(W)/AD2427(W)/AD2428(W)/AD2429(W) TABLE OF CONTENTS A2B Bus Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A2B Transceiver Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 A2B Bus Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 I2C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 I2S/TDM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pulse Density Modulation (PDM) Interface . . . . . . . . . . . . . . . . . 6 GPIO Over Distance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Mailboxes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Data Slot Exchange Between Slaves . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Clock Sustain State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Programmable Settings to Optimize EMC  Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power Supply Rejection Ratio (PSRR) . . . . . . . . . . . . . . . . . . . . . . 11 Timing Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Power-Up Sequencing Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . 16 A2B Bus System Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 PDM Typical Performance Characteristics . . . . . . . .


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