SN74AUC2G66 SWITCH Datasheet

SN74AUC2G66 Datasheet, PDF, Equivalent


Part Number

SN74AUC2G66

Description

DUAL BILATERAL ANALOG SWITCH

Manufacture

etcTI

Total Page 23 Pages
Datasheet
Download SN74AUC2G66 Datasheet


SN74AUC2G66
www.ti.com
FEATURES
Available in the Texas Instruments
NanoFree™ Package
Operates at 0.8 V to 2.7 V
Sub-1-V Operable
Max tpd of 0.5 ns at 1.8 V
Low Power Consumption, 10 µA at 2.7 V
High On-Off Output Voltage Ratio
High Degree of Linearity
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN74AUC2G66
DUAL BILATERAL ANALOG SWITCH
SCES507A – NOVEMBER 2003 – REVISED JANUARY 2007
DCT OR DCU PACKAGE
(TOP VIEW)
1A
1B
2C
GND
1
2
3
4
8 VCC
7 1C
6 2B
5 2A
YZP PACKAGE
(BOTTOM VIEW)
GND 4 5 2A
2C 3 6 2B
1B 2 7 1C
1A 1 8 VCC
DESCRIPTION/ORDERING INFORMATION
This dual analog switch is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.1-V to 2.7-V VCC
operation.
The SN74AUC2G66 can handle both analog and digital signals. It permits signals with amplitudes of up to 2.7-V
(peak) to be transmitted in either direction.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for
analog-to-digital and digital-to-analog conversion systems.
ORDERING INFORMATION
TA
–40°C to 85°C
PACKAGE (1)
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT
Reel of 3000
Reel of 3000
ORDERABLE PART NUMBER TOP-SIDE MARKING(2)
SN74AUC2G66YZPR
_ _ _U6_
SN74AUC2G66DCTR
U66_ _ _
VSSOP – DCU
Reel of 3000
SN74AUC2G66DCUR
U66_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).
FUNCTION TABLE
CONTROL
INPUT
(C)
L
H
SWITCH
OFF
ON
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2007, Texas Instruments Incorporated

SN74AUC2G66
SN74AUC2G66
DUAL BILATERAL ANALOG SWITCH
SCES507A – NOVEMBER 2003 – REVISED JANUARY 2007
LOGIC DIAGRAM (POSITIVE LOGIC)
www.ti.com
1
A
4
C
2
B
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
VCC Supply voltage range(2)
VI Input voltage range(2)(3)
VI/O Switch I/O voltage range (2)(3)
IIK Control input clamp current
IIOK I/O port diode current
IT On-state switch current
Continuous current through VCC or GND
θJA Package thermal impedance(4)
Tstg Storage temperature range
VI < 0
VI/O < 0 or VI/O > VCC
VI/O = 0 to VCC
DCT package
DCU package
YZP package
MIN
–0.5
–0.5
–0.5
–65
MAX
3.6
3.6
VCC + 0.5
–50
±50
±50
±100
220
227
102
150
UNIT
V
V
V
mA
mA
mA
mA
°C/W
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground unless otherwise specified.
(3) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
2 Submit Documentation Feedback


Features www.ti.com FEATURES • Available in the Texas Instruments NanoFree™ Package • Operates at 0.8 V to 2.7 V • Sub- 1-V Operable • Max tpd of 0.5 ns at 1 .8 V • Low Power Consumption, 10 µA at 2.7 V • High On-Off Output Voltage Ratio • High Degree of Linearity • Latch-Up Performance Exceeds 100 mA Pe r JESD 78, Class II • ESD Performance Tested Per JESD 22 – 2000-V Human-Bo dy Model (A114-B, Class II) – 200-V M achine Model (A115-A) – 1000-V Charge d-Device Model (C101) SN74AUC2G66 DUAL BILATERAL ANALOG SWITCH SCES507A – N OVEMBER 2003 – REVISED JANUARY 2007 DCT OR DCU PACKAGE (TOP VIEW) 1A 1B 2C GND 1 2 3 4 8 VCC 7 1C 6 2B 5 2A YZ P PACKAGE (BOTTOM VIEW) GND 4 5 2A 2C 3 6 2B 1B 2 7 1C 1A 1 8 VCC DESCRIPTION /ORDERING INFORMATION This dual analog switch is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.1-V to 2.7-V VCC operation. The SN74A UC2G66 can handle both analog and digit al signals. It permits signals with amplitudes of up to 2.7-V (peak) to be transmitted in eith.
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