DUAL INVERTER GATE
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SN74AUC2GU04 DUAL INVERTER GATE
SCES438C – APRIL 2003 – REVISED JANUARY 2007
FEATURES
• Available in the Te...
Description
www.ti.com
SN74AUC2GU04 DUAL INVERTER GATE
SCES438C – APRIL 2003 – REVISED JANUARY 2007
FEATURES
Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
Sub-1-V Operable Unbuffered Outputs Max tpd of 1.9 ns at 1.8 V
Low Power Consumption, 10 µA at 1.8 V ±8-mA Output Drive at 1.8 V Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DBV PACKAGE (TOP VIEW)
DCK PACKAGE (TOP VIEW)
1A GND
1 2
6 1Y
1A 1 6 1Y
GND 2 5 VCC
5 VCC 2A 3 4 2Y
YZP PACKAGE (BOTTOM VIEW)
2A 3 4 2Y GND 2 5 VCC
1A 1 6 1Y
2A 3 4 2Y
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This dual inverter is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUC2GU04 contains two inverters with unbuffered outputs and performs the Boolean function Y = A.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
For more information about AUC Little Logic devices, please refer to the TI application report, Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.
TA –40°C to 85°C
ORDERING INFORMATION
PACKAGE (1)
ORDERABLE PART NUMBER
NanoFree™ – WCSP (DSBGA) 0.23-mm Large Bump – YZP (Pb-fr...
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