CS47L15 Codec Datasheet

CS47L15 Datasheet, PDF, Equivalent


Part Number

CS47L15

Description

Smart Codec

Manufacture

Cirrus Logic

Total Page 30 Pages
Datasheet
Download CS47L15 Datasheet


CS47L15
CS47L15
Smart Codec with Low-Power Audio DSP
Features
• Earpiece, speaker, and digital (pulse-density modulation,
PDM) output interfaces
• 150 MIPS, 150 MMAC audio-signal processor
— Two-way stereo PDM interface
— Low-power, always-on voice trigger capability
• Three full digital-audio interfaces
— Speaker protection algorithm support
— Standard sample rates from 8 to 192 kHz
— Event loggers with time-stamp and interrupt functions — Multichannel support on AIF1 and AIF2
• Programmable wideband audio processing
• Self-boot capability from external non-volatile memory
— Transmit-path noise reduction and echo cancelation • Flexible clocking, derived from MCLKn or AIFn
• Integrated multichannel 24-bit hi-fi audio hub codec
• Low-power frequency-locked loops (FLLs) support
— 98-dB signal-to-noise ratio (SNR) mic input (48 kHz) reference clocks down to 32 kHz
— 127-dB SNR headphone playback (48 kHz)
• Advanced accessory detection functions
— Low-power analog input modes
• Up to four analog or four digital microphone (DMIC)
inputs
• Configurable functions on up to 15 general-purpose
input/output (GPIO) pins
• Small WLCSP package, 0.4-mm ball array
— Speaker-monitoring input path (analog or digital)
• Stereo headphone/earpiece/line output driver: 30 mW
into 32-load at 0.1% total harmonic distortion + noise
(THD+N)
Applications
• Smartphones, tablets, and wearable technology
— Karaoke algorithm support
MICBIAS1A
MICBIAS1B
MICBIAS1C
AVDD
AGND
VREFC
IN1BLN
IN1BLP
IN1ALN/DMICCLK
IN1ALP/DMICDAT
IN1BRN
IN1BRP
IN1ARN
IN1ARP
IN2N
IN2P
SPKRXDAT
MCLK1
MCLK2
RESET
IRQ
MICBIAS
Generator
Charge Pump
CS47L15
External Accessory
Detect
Reference
Generator
ADC
ADC
Input
Select
Digital Mic
Interface
ADC
Input
Select
AIFnBCLK
AIFnLRCLK
Digital PDM
Interface
Clocking
Control
2 x FLL
SYSCLK
DSPCLK
Digital Core
Programmable DSP
Always-on signal processing
TX noise reduction
Acoustic-echo cancelation
Speaker protection
Five-band equal izer (EQ)
Dynamic range control (DRC)
Low-pass/high-pass filter (LHPF)
Automatic sample -rate detection
Tone generator
Noise generator
PWM signal generator
Haptic control signal generator
DAC
DAC
DAC
PDM
Driver
AEC (Echo Cancelation)
Loop-Back
General
Purpose
Switch
Digital Audio
Interface AIF1
Digital Audio
Interface AIF2
Digital Audio
Interface AIF3
Control Interfaces (SPI, I2C)
Master Interface (SPI)
HPOUTL
HPOUTR
EPOUTP
EPOUTN
SPKOUTP
SPKOUTN
SPKCLK
SPKTXDAT
GPSWP
GPSWN
http://www.cirrus.com
Copyright Cirrus Logic, Inc. 2016–2017
(All Rights Reserved)
DS1137F1
AUG '17

CS47L15
CS47L15
Description
The CS47L15 is a highly integrated, low-power audio hub for smartphones, tablets, and other portable audio devices
including wearable technology. It combines an advanced DSP feature set with a flexible, high-performance audio hub
codec. The CS47L15 combines a programmable DSP core with a variety of power-efficient fixed-function audio
processors. An SPI master interface is provided, for autonomous boot-up and configuration using an external non-volatile
memory—enabling the CS47L15 to be used independently of a host processor.
The DSP core supports advanced audio processing functions such as wideband noise reduction, acoustic-echo
cancelation (AEC), speech enhancement, karaoke, and many more. Low-power analog and digital interfaces provide
flexible support for always-on voice applications and speaker-protection algorithms implemented on the programmable
DSP core. The DSP core is integrated within a fully flexible, all-digital mixing and routing engine with sample-rate
converters, for wide use-case flexibility. Support for third-party DSP programming provides far-reaching opportunities for
product differentiation.
Three digital audio interfaces are provided, each supporting a wide range of standard audio sample rates and serial
interface formats. Automatic sample-rate detection enables seamless wideband/narrowband voice-call handover. The
DACs and output paths provide full support for high definition audio throughout the entire signal chain.
The stereo headphone driver provides ground-referenced output, with noise levels as low as 0.45 VRMS for hi-fi quality
line or headphone output. The CS47L15 also features a mono bridge-tied load (BTL) earpiece output, mono 2.5-W Class D
speaker driver, two channels of stereo PDM output, and an IEC-60958-3–compatible S/PDIF transmitter. A signal
generator for controlling haptics devices is included; vibe actuators can connect directly to the Class D speaker output, or
via an external driver on the PDM output interface.
The CS47L15 supports up to five analog inputs, and up to four PDM digital inputs. As many as four analog microphone
connections can be supported; a separate analog input channel is provided for use in speaker-protection applications.
Microphone activity detection with interrupt is available. A smart accessory interface supports most standard 3.5-mm
accessories. Impedance sensing and measurement is provided for external accessory and push-button detection
(Android™ headset specification compliant).
The CS47L15 supports SPI™ and I2C interface modes for control-register access. The CS47L15 can also be configured
as SPI master, enabling autonomous boot-up and configuration without dependency on a host processor. Two integrated
FLLs support a wide range of system-clock frequencies. The device is powered from 1.8- and 1.2-V supplies. Separate
MICVDD input can be supported, for microphone operation above 1.8 V. An additional supply is required for the Class D
speaker drivers (typically direct connection to 4.2-V battery). The power, clocking, and output driver architectures are
designed to maximize battery life in voice, music, and standby modes. Low-power (25 W) Sleep Mode is supported, with
configurable wake-up events.
2 DS1137F1


Features CS47L15 Smart Codec with Low-Power Audi o DSP Features • Earpiece, speaker, and digital (pulse-density modulation, PDM) output interfaces • 150 MIPS, 150 MMAC audio-signal processor — Tw o-way stereo PDM interface — Low-pow er, always-on voice trigger capability • Three full digital-audio interface s — Speaker protection algorithm sup port — Standard sample rates from 8 to 192 kHz — Event loggers with time -stamp and interrupt functions — Mult ichannel support on AIF1 and AIF2 • Programmable wideband audio processing • Self-boot capability from external non-volatile memory — Transmit-path noise reduction and echo cancelation Flexible clocking, derived from MCLK n or AIFn • Integrated multichannel 24-bit hi-fi audio hub codec • Low-p ower frequency-locked loops (FLLs) supp ort — 98-dB signal-to-noise ratio (S NR) mic input (48 kHz) reference clocks down to 32 kHz — 127-dB SNR headpho ne playback (48 kHz) • Advanced accessory detection functions — Low-power analog input modes • .
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