AFE5401-Q1 Front-End Datasheet

AFE5401-Q1 Datasheet, PDF, Equivalent


Part Number

AFE5401-Q1

Description

Quad-Channel Analog Front-End

Manufacture

etcTI

Total Page 30 Pages
Datasheet
Download AFE5401-Q1 Datasheet


AFE5401-Q1
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
AFE5401-Q1
SBAS619A – MARCH 2014 – REVISED JUNE 2017
AFE5401-Q1 Quad-Channel, Analog Front-End for Automotive Radar Baseband Receiver
1 Features
1 Qualified for Automotive Applications
• AEC-Q100 Qualified With the Following Results:
– Device Temperature Grade 1: –40°C to 125°C
Ambient Operating Temperature Range
– Device HBM ESD Classification Level 2
– Device CDM ESD Classification Level C4B
• Integrated Analog Front-End Includes:
– Quad LNA, Equalizer, PGA, Antialiasing Filter,
and ADC
• Input-Referred Noise with 30-dB PGA Gain:
– 2.9-nV/Hz for 15-dB LNA Gain
– 2.0-nV/Hz for 18-dB LNA Gain with
HIGH_POW_LNA Mode
• Simultaneous Sampling Across Channels
• Programmable LNA Gain:
12 dB, 15 dB, 16.5 dB, and 18 dB
• Programmable Equalizer Modes
• Built-In Diagnostic Modes
• Temperature Sensor
• Programmable-Gain Amplifiers (PGAs):
– 0 dB to 30 dB in 3-dB Steps
• Programmable, Third-Order, Antialiasing Filter:
– 7 MHz, 8 MHz, 10.5 MHz, and 12 MHz
• Analog-to-Digital Converter (ADC):
– Quad Channel, 12 Bits, 25 MSPS per Channel
– No External Decoupling Required for
References
• Parallel CMOS Outputs
• 64-mW Total Core Power per Channel at
25 MSPS per Channel
• Supplies: 1.8 V and 3.3 V
• Package: 9-mm × 9-mm VQFN-64
2 Applications
• Automotive Radar
• Data Acquisition
• SONAR™
3 Description
The AFE5401-Q1 is an analog front-end (AFE),
targeting applications where the level of integration is
critical. The device includes four channels, with each
channel comprising a low-noise amplifier (LNA), a
programmable equalizer (EQ), a programmable gain
amplifier (PGA), and an antialias filter followed by a
high-speed, 12-bit, analog-to-digital converter (ADC)
at 25 MSPS per channel.
Each of the four differential input pairs are amplified
by an LNA and are followed by a PGA with a
programmable gain range from 0 dB to 30 dB. An
antialias, low-pass filter (LPF) is also integrated
between the PGA and ADC for each channel.
Each LNA, PGA, and antialiasing filter output is
differential (limited to 2 VPP). The antialiasing filter
drives the on-chip, 12-bit, 25-MSPS ADC. The four
ADC outputs are multiplexed on a 12-bit, parallel,
CMOS output bus.
The device is available in a 9-mm × 9-mm, VQFN-64
package and is specified over a temperature range of
–40°C to +105°C. For more information, contact
AFE5401_info@list.ti.com.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
AFE5401-Q1
VQFN (64)
9.00 mm × 9.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
AVDD3
DRVDD
AVDD18
DVDD18
INx
INx_AUX
CLKINP
CLKINM
TRIG
LNA
PGA
EQ
Antialiasing
Filter
EQ
BUF
Channel 1 of 4
ADC 1
Serial Interface
4:1 MUX
CMOS, DIFF
Support
1x
ADC_CLK
AFE_CLK
4x
Serialization Factor
Clock + Timing Generator
D [11:0]
D_GPO [1:0]
DCLK
DSYNC1
DSYNC2
AVSS
DRVSS
AVSS
DVSS
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

AFE5401-Q1
AFE5401-Q1
SBAS619A – MARCH 2014 – REVISED JUNE 2017
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 6
6.4 Thermal Information .................................................. 6
6.5 Electrical Characteristics........................................... 7
6.6 Digital Characteristics ............................................... 8
6.7 Timing Requirements: Output Interface .................... 9
6.8 Timing Requirements: RESET.................................. 9
6.9 Timing Requirements: Serial Interface Operation... 10
6.10 Typical Characteristics .......................................... 12
7 Parameter Measurement Information ................ 21
7.1 Timing Requirements: Across Output Serialization
Modes ...................................................................... 21
8 Detailed Description ............................................ 23
8.1 Overview ................................................................. 23
8.2 Functional Block Diagram ....................................... 24
8.3 Feature Description................................................. 25
8.4 Device Functional Modes........................................ 32
8.5 Programming........................................................... 41
8.6 Register Maps ......................................................... 44
9 Application and Implementation ........................ 64
9.1 Application Information............................................ 64
9.2 Typical Application .................................................. 64
10 Power Supply Recommendations ..................... 68
10.1 Power Supply Sequencing .................................... 68
10.2 Power Supply Decoupling ..................................... 68
11 Layout................................................................... 68
11.1 Layout Guidelines ................................................. 68
11.2 Layout Example .................................................... 69
12 Device and Documentation Support ................. 71
12.1 Documentation Support ........................................ 71
12.2 Receiving Notification of Documentation Updates 71
12.3 Community Resources.......................................... 71
12.4 Trademarks ........................................................... 71
12.5 Electrostatic Discharge Caution ............................ 71
12.6 Glossary ................................................................ 71
13 Mechanical, Packaging, and Orderable
Information ........................................................... 71
4 Revision History
Changes from Original (March 2014) to Revision A
Page
• Added automotive Features bullets ....................................................................................................................................... 1
• First public release ................................................................................................................................................................ 1
• Changed Device Information table to current standards ....................................................................................................... 1
• Changed order of Pin Functions table to be sorted by pin name instead of pin number....................................................... 4
• Changed ESD Rating table title and format, moved Storage temperature parameter to Absolute Maximum Ratings table . 5
• Added Receiving Notification of Documentation Updates and Community Resources sections ......................................... 71
2 Submit Documentation Feedback
Product Folder Links: AFE5401-Q1
Copyright © 2014–2017, Texas Instruments Incorporated


Features Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity AFE5401-Q1 SBAS619A – MARCH 2 014 – REVISED JUNE 2017 AFE5401-Q1 Qu ad-Channel, Analog Front-End for Automo tive Radar Baseband Receiver 1 Feature s •1 Qualified for Automotive Applica tions • AEC-Q100 Qualified With the F ollowing Results: – Device Temperatur e Grade 1: –40°C to 125°C Ambient O perating Temperature Range – Device H BM ESD Classification Level 2 – Devic e CDM ESD Classification Level C4B • Integrated Analog Front-End Includes: Quad LNA, Equalizer, PGA, Antialiasi ng Filter, and ADC • Input-Referred N oise with 30-dB PGA Gain: – 2.9-nV/ Hz for 15-dB LNA Gain – 2.0-nV/√Hz for 18-dB LNA Gain with HIGH_POW_LNA M ode • Simultaneous Sampling Across Ch annels • Programmable LNA Gain: 12 dB , 15 dB, 16.5 dB, and 18 dB • Program mable Equalizer Modes • Built-In Diag nostic Modes • Temperature Sensor • Programmable-Gain Amplifiers (PGAs): – 0 dB to 30 dB in 3-dB Steps • Programmable, Third-Order, Antialiasi.
Keywords AFE5401-Q1, datasheet, pdf, etcTI, Quad-Channel, Analog, Front-End, FE5401-Q1, E5401-Q1, 5401-Q1, AFE5401-Q, AFE5401-, AFE5401, Equivalent, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)