Low-Dropout Regulator. TLV702 Datasheet

TLV702 Regulator. Datasheet pdf. Equivalent

TLV702 Datasheet
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Part TLV702
Description Low-Dropout Regulator
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Sample &
Buy
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TLV702
SLVSAG6C – SEPTEMBER 2010 – REVISED MARCH 2015
TLV702 300-mA, Low-IQ, Low-Dropout Regulator
1 Features
1 Very Low Dropout:
– 37 mV at IOUT = 50 mA, VOUT = 2.8 V
– 75 mV at IOUT = 100 mA, VOUT = 2.8 V
– 220mV at IOUT = 300 mA, VOUT = 2.8 V
• 2% Accuracy
• Low IQ: 35 μA
• Fixed-Output Voltage Combinations Possible from
1.2 V to 4.8 V
• High PSRR: 68 dB at 1 kHz
• Stable With Effective Capacitance of 0.1 μF(1)
• Thermal Shutdown and Overcurrent Protection
• Packages: 5-Pin SOT-23 and 1.5-mm × 1.5-mm,
6-Pin WSON
(1) See the Input and Output Capacitor Requirements in
Application Information.
2 Applications
• Wireless Handsets
• Smart Phones
• ZigBee® Networks
Bluetooth® Devices
• Li-Ion Battery-Operated Handheld Products
• WLAN and Other PC Add-on Cards
3 Description
The TLV702 series of low-dropout (LDO) linear
regulators are low quiescent current devices with
excellent line and load transient performance. These
LDOs are designed for power-sensitive applications.
A precision bandgap and error amplifier provides
overall 2% accuracy. Low output noise, very high
power-supply rejection ratio (PSRR), and low-dropout
voltage make this series of devices ideal for a wide
selection of battery-operated handheld equipment. All
device versions have thermal shutdown and current
limit for safety.
Furthermore, these devices are stable with an
effective output capacitance of only 0.1 μF. This
feature enables the use of cost-effective capacitors
that have higher bias voltages and temperature
derating. The devices regulate to specified accuracy
with no output load.
The TLV702P series also provides an active pulldown
circuit to quickly discharge the outputs.
The TLV702 series of LDO linear regulators are
available in SOT23-5 and 1.5-mm × 1.5-mm SON-6
packages.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TLV702
SOT-23 (5)
WSON (6)
2.90 mm × 1.60 mm
1.50 mm × 1.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Circuit
VIN
CIN
On
Off
IN
OUT
VOUT
COUT
1 mF
Ceramic
TLV702xx
EN
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



Texas Instruments TLV702
TLV702
SLVSAG6C – SEPTEMBER 2010 – REVISED MARCH 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings ............................................................ 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics .............................................. 6
7 Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagrams ..................................... 10
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 12
8 Application and Implementation ........................ 13
8.1 Application Information............................................ 13
8.2 Typical Application .................................................. 13
9 Power Supply Recommendations...................... 15
9.1 Power Dissipation ................................................... 15
10 Layout................................................................... 15
10.1 Layout Guidelines ................................................. 15
10.2 Layout Examples................................................... 15
10.3 Thermal Consideration.......................................... 16
10.4 Package Mounting ................................................ 16
11 Device and Documentation Support ................. 17
11.1 Device Support .................................................... 17
11.2 Documentation Support ........................................ 17
11.3 Related Links ........................................................ 17
11.4 Trademarks ........................................................... 18
11.5 Electrostatic Discharge Caution ............................ 18
11.6 Glossary ................................................................ 18
12 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (February 2011) to Revision C
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
• Changed Pin Configuration and Functions section; updated table format ............................................................................ 3
• Deleted Ordering Information table ....................................................................................................................................... 3
• Changed "free-air temperature" to "junction temperature" in Absolute Maximum Ratings condition statement ................... 4
• Changed Thermal Information table; updated thermal resistance values for all packages .................................................. 4
• Deleted Dissipation Ratings table .......................................................................................................................................... 4
• Changed VDO dropout voltage test conditions; deleted IOUT = 50 mA and IOUT = 100 mA with VOUT = 2.8 V test
parameters ............................................................................................................................................................................. 5
• Deleted EVM Dissipation Ratings table ............................................................................................................................... 16
Changes from Revision A (October 2010) to Revision B
Page
• Added SON-6 (DSE) package and related references to data sheet..................................................................................... 1
2 Submit Documentation Feedback
Product Folder Links: TLV702
Copyright © 2010–2015, Texas Instruments Incorporated



Texas Instruments TLV702
www.ti.com
5 Pin Configuration and Functions
DBV Package
5-Pin SOT-23
Top View
IN 1 5 OUT
GND
2
EN 3 4 NC
TLV702
SLVSAG6C – SEPTEMBER 2010 – REVISED MARCH 2015
DSE Package
6-Pin WSON
Top View
IN 1
GND 2
OUT 3
6 EN
5 N/C
4 N/C
NAME
IN
GND
PIN
SOT-23
1
2
WSON
1
2
EN 3 6
NC
OUT
4 4, 5
55
Pin Functions
I/O DESCRIPTION
Input pin. A small, 1-μF ceramic capacitor is recommended from this pin to ground to
I assure stability and good transient performance. See Input and Output Capacitor
Requirements in Application Information for more details.
— Ground pin
Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts
I
the regulator into shutdown mode and reduces operating current to 1 μA, nominal.
For TLV702P, output voltage is discharged through an internal 120-Ω resistor when
device is shut down.
— No connection. This pin can be tied to ground to improve thermal dissipation.
Regulated output voltage pin. A small, 1-μF ceramic capacitor is needed from this pin
O to ground to assure stability. See Input and Output Capacitor Requirements in
Application Information for more details.
Copyright © 2010–2015, Texas Instruments Incorporated
Product Folder Links: TLV702
Submit Documentation Feedback
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