Step-Down Switcher. TPS54327 Datasheet

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TPS54327 Datasheet
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Part TPS54327
Description 3-A Output Single Synchronous Step-Down Switcher
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Texas Instruments TPS54327
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
Reference
Design
TPS54327
SLVSAG1C – DECEMBER 2010 – REVISED DECEMBER 2015
TPS54327 3-A Output Single Synchronous Step-Down Switcher
With Integrated FET
1 Features
1 D-CAP2™ Mode Enables Fast Transient
Response
• Low-Output Ripple and Allows Ceramic Output
Capacitor
• Wide VIN Input Voltage Range: 4.5 V to 18 V
• Output Voltage Range: 0.76 V to 7 V
• Highly Efficient Integrated FETs Optimized
for Lower Duty Cycle Applications
– 100 m(High-Side) and 70 m(Low-Side)
• High Efficiency, Less Than 10 μA at shutdown
• High Initial Bandgap Reference Accuracy
• Adjustable Soft Start
• Prebiased Soft Start
• 700-kHz Switching Frequency (fSW)
• Cycle-By-Cycle Overcurrent Limit
2 Applications
• Wide Range of Applications for Low Voltage
System
– Digital TV Power Supply
– High Definition Blu-ray Disc™ Players
– Networking Home Terminal
– Digital Set Top Box (STB)
3 Description
The TPS54327 device is an adaptive on-time D-
CAP2™ mode synchronous buck converter.
TheTPS54327 enables system designers to complete
the suite of various end equipment’s power bus
regulators with a cost effective, low component count,
low standby current solution. The main control loop
for the TPS54327 uses the D-CAP2 mode control
which provides a fast transient response with no
external compensation components. The TPS54327
also has a proprietary circuit that enables the device
to adopt to both low equivalent series resistance
(ESR) output capacitors, such as POSCAP or SP-
CAP, and ultra-low ESR ceramic capacitors. The
device operates from 4.5-V to 18-V VIN input. The
output voltage can be programmed between 0.76 V
and 7 V. The device also features an adjustable soft
start time. The TPS54327 is available in the 8-pin
DDA package and 10-pin DRC, and is designed to
operate from –40°C to 85°C.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPS54327
HSOP (8)
VSON (10)
4.89 mm × 3.90 mm
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
TPS54327 Transient Response
Vout (50 mV/div)
Iout (2 A/div)
100 ms/div
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



Texas Instruments TPS54327
TPS54327
SLVSAG1C – DECEMBER 2010 – REVISED DECEMBER 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics .............................................. 6
7 Detailed Description .............................................. 7
7.1 Overview ................................................................... 7
7.2 Functional Block Diagram ......................................... 7
7.3 Feature Description................................................... 7
7.4 Device Functional Modes.......................................... 9
8 Application and Implementation ........................ 10
8.1 Application Information............................................ 10
8.2 Typical Application ................................................. 10
9 Power Supply Recommendations...................... 14
10 Layout................................................................... 14
10.1 Layout Guidelines ................................................. 14
10.2 Layout Examples................................................... 15
10.3 Thermal Considerations ........................................ 17
11 Device and Documentation Support ................. 18
11.1 Documentation Support ........................................ 18
11.2 Community Resources.......................................... 18
11.3 Trademarks ........................................................... 18
11.4 Electrostatic Discharge Caution ............................ 18
11.5 Glossary ................................................................ 18
12 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (January 2012) to Revision C
Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
• Removed Ordering Information table .................................................................................................................................... 1
Changes from Revision A (October 2011) to Revision B
Page
• Removed (SWIFT™) from the data sheet title ....................................................................................................................... 1
• Added "and 10-pin DRC" to the DESCRIPTION .................................................................................................................... 1
• Added the DRC-10 Pin package pin out ................................................................................................................................ 3
• Changed the VBST(vs SW) MAX value From: 6V to 6.5V in the Abs Max Ratings table ..................................................... 4
• Changed the VBST(vs SW) MAX value From: 5.7V to 6V in the ROC table......................................................................... 4
• Changed UVLO MIn Value From: 0.19 V To: 0.17 V ............................................................................................................. 5
• Added Added a conditions statement "VIN = 12 V, TA = 25°C" to the TYPICAL CHARACTERISTICS ............................... 6
• Changed Figure 10 title From: 1.05-V, 50-mA to 2-A LOAD TRANSIENT RESPONSE To: 1.05-V, 0-A to 3-A LOAD
TRANSIENT RESPONSE .................................................................................................................................................... 12
• Changed Figure 12 Figure Title From: (IO = 2 A) To: (IO = 3 A)........................................................................................... 12
• Changed Figure 13 Figure Title From: (IO = 2 A) To: (IO = 3 A)........................................................................................... 12
• Added Figure 17 ................................................................................................................................................................... 16
Changes from Original (November 2010) to Revision A
Page
• Changed Pin 6 (SW) Description In the Pin Functions table ................................................................................................ 3
• Changed the VENH Min value From: 2 V To: 1.6 V in the Logic Threshold section ................................................................ 5
• Changed Figure 4................................................................................................................................................................... 6
• Changed Equation 1............................................................................................................................................................... 8
2 Submit Documentation Feedback
Product Folder Links: TPS54327
Copyright © 2010–2015, Texas Instruments Incorporated



Texas Instruments TPS54327
www.ti.com
5 Pin Configuration and Functions
DDA Package
8-Pin HSOP
Top View
1 EN
VIN 8
2 VFB
TPS54327
(DDA)
VBST 7
3 VREG5 PowerPAD
SW 6
4 SS
GND 5
TPS54327
SLVSAG1C – DECEMBER 2010 – REVISED DECEMBER 2015
EN 1
VFB 2
VREG5 3
SS 4
GND 5
DRC Package
10-Pin VSON
Top View
Exposed
Thermal
Die PAD
on
Underside
PGND
10 VIN
9 VIN
8 VBST
7 SW
6 SW
NAME
EN
VFB
VREG5
SS
GND
SW
PIN
HSOP
1
2
3
4
5
6
VSON
1
2
3
4
5
6, 7
VBST
7
8
VIN 8
PowerPAD Back side
Exposed
thermal
pad
9, 10
Back side
TYPE
I
I
O
O
G
O
I
P
G
G
Pin Functions
DESCRIPTION
Enable input control. Active high.
Converter feedback input. Connect to output voltage with feedback resistor divider.
5.5 V power supply output. A capacitor (typical 1 µF) should be connected to GND.
VREG5 is not active when EN is low.
Soft-start control. An external capacitor should be connected to GND.
Ground pin. Power ground return for switching circuit. Connect sensitive SS and VFB
returns to GND at a single point.
Switch node connection between high-side NFET and low-side NFET.
Supply input for the high-side FET gate drive circuit. Connect 0.1µF capacitor
between VBST and SW pins. An internal diode is connected between VREG5 and
VBST.
Input voltage supply pin.
PowerPAD of the package. Must be soldered to achieve appropriate dissipation. Must
be connected to GND.
Thermal pad of the package. PGND power ground return of internal low-side FET.
Must be soldered to achieve appropriate dissipation.
Copyright © 2010–2015, Texas Instruments Incorporated
Product Folder Links: TPS54327
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