Octal ECL-to-TTL Translator
• 10KH Compatible
• ECL and TTL Control Inputs
• Inverting Outputs
• Flow-Through Architecture Optimizes PCB
Layout
• Ce...
Description
10KH Compatible
ECL and TTL Control Inputs
Inverting Outputs
Flow-Through Architecture Optimizes PCB
Layout
Center Pin VCC, VEE, and GND
Configurations Minimize High-Speed Switching Noise
Package Options Include “Small Outline”
Packages and Standard Plastic 300-mil DIPs
description
This octal ECL-to-TTL translator is designed to provide a efficient translation between a 10KH ECL signal environment and a TTL signal environment. This device is designed specifically to improve the performance and density of ECL-to-TTL CPU/bus-oriented functions such as memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.
Two output enable pins, OE1 and OE2, are provided. These control inputs are ANDed together with OE1 being ECL compatible and OE2 being TTL compatible. This offers the choice of controlling the outputs of the device from either a TTL or ECL signal environment.
The SN10KHT5540 is characterized for operation from 0°C to 75°C.
FUNCTION TABLE
OUTPUT ENABLE OE1 OE2 XH HX LL LL
DATA INPUT
A X X L H
OUTPUT (TTL) Y Z Z H L
SN10KHT5540 OCTAL ECLĆTOĆTTL TRANSLATOR
WITH 3ĆSTATE OUTPUTS
SDZS006 − DECEMBER 1990
DW OR NT PACKAGE (T0P VIEW)
Y1 Y2 Y3 Y4 VCC GND GND GND Y5 Y6 Y7 Y8
1 2 3 4 5 6 7 8 9 10 11 12
24 A1 23 A2 22 A3 21 A4 20 OE2 (TTL) 19 VEE 18 GND 17 OE1 (ECL) 16 A5 15 A6 14 A7 13 A8
logic symbol†
OE1 17 OE2 20
ECL/TTL & EN
A1 24
A2 23
A3 22 A4 21
16 A5
15 A6
14 A7 A8 13
ECL/TTL
1 Y1
2 Y2
3 Y3 4 Y4 9
Y5 10
Y6 11
Y7 12 Y8
† This...
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