FPD-Link Converter. DS99R124Q Datasheet

DS99R124Q Converter. Datasheet pdf. Equivalent


Part DS99R124Q
Description 5 - 43 MHz 18-bit Color FPD-Link II to FPD-Link Converter
Feature DS99R124Q www.ti.com SNLS318D – JANUARY 2010 – REVISED APRIL 2013 DS99R124Q 5 - 43 MHz 18-bit Col.
Manufacture etcTI
Datasheet
Download DS99R124Q Datasheet


DS99R124Q 5 - 43 MHz 18-bit Color FPD-Link II to FPD-Link Co DS99R124Q Datasheet
DS99R124Q www.ti.com SNLS318D – JANUARY 2010 – REVISED APR DS99R124Q Datasheet
Recommendation Recommendation Datasheet DS99R124Q Datasheet




DS99R124Q
DS99R124Q
www.ti.com
SNLS318D – JANUARY 2010 – REVISED APRIL 2013
DS99R124Q 5 - 43 MHz 18-bit Color FPD-Link II to FPD-Link Converter
Check for Samples: DS99R124Q
FEATURES
1
2 5 – 43 MHz Support (140 Mbps to 1.2 Gbps
Serial Link)
• 4-Channel (3 data + 1 Clock) FPD-Link LVDS
Outputs
• 3 Low-Speed Over-Sampled LVCMOS Outputs
• AC Coupled STP Interconnect up to 10 Meters
in Length
• Integrated Input Termination
• @ Speed Link BIST Mode and Reporting Pin
• Optional I2C Compatible Serial Control Bus
• RGB666 + VS, HS, DE Converted from 1 Pair
• Power Down Mode Minimizes Power
Dissipation
• FAST Random Data Lock; no Reference Clock
Required
• Adjustable Input Receive Equalization
• LOCK (Real Time Link Status) Reporting Pin
• Low EMI FPD-Link Output
• SSCG Option for Lower EMI
• 1.8V or 3.3V Compatible I/O Interface
• Automotive Grade Product: AEC-Q100 Grade 2
Qualified
• >8 kV HBM and ISO 10605 ESD Rating
APPLICATIONS
• Automotive Display for Navigation
• Automotive Display for Entertainment
DESCRIPTION
The DS99R124Q converts FPD-Link II to FPD-Link. It
translates a high-speed serialized interface with an
embedded clock over a single pair (FPD-Link II) to
three LVDS data/control streams and one LVDS clock
pair (FPD-Link). This serial bus scheme greatly eases
system design by eliminating skew problems between
clock and data, reduces the number of connector
pins, reduces the interconnect size, weight, and cost,
and overall eases PCB layout. In addition, internal
DC balanced decoding is used to support AC-coupled
interconnects.
The DS99R124Q converter recovers the data (RGB)
and control signals and extracts the clock from a
serial stream (FPD-Link II). It is able to lock to the
incoming data stream without the use of a training
sequence or special SYNC patterns and does not
require a reference clock. A link status (LOCK) output
signal is provided.
Adjustable input equalization of the serial input
stream provides compensation for transmission
medium losses of the cable and reduces the medium-
induced deterministic jitter. EMI is minimized by the
use of low voltage differential signaling, output state
select feature, and additional output spread spectrum
generation.
With fewer wires to the physical interface of the
display, FPD-Link output with LVDS technology is
ideal for high speed, low power and low EMI data
transfer.
The DS99R124Q is offered in a 48-pin WQFN
package and is specified over the automotive AEC-
Q100 Grade 2 temperature range of -40˚C to +105˚C.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010–2013, Texas Instruments Incorporated



DS99R124Q
DS99R124Q
SNLS318D – JANUARY 2010 – REVISED APRIL 2013
Applications Diagram
www.ti.com
HOST
Graphics
Processor
FPD-Link
3.3V
RxIN2+/-
RxIN1+/-
RxIN0+/-
RxCLKIN+/-
PWDNB
OS[2:0]
BISTEN
DEN
PRE
VODSEL
DOUT+
DOUT-
DS99R421Q
Converter
FPD-Link II
FPD-Link
VDDIO
1.8V 3.3V (1.8V or 3.3V)
High-Speed Serial Link
1 Pair/AC Coupled
100 ohm STP Cable
CMF
SSC[2:0]
LFMODE
BISTM
BISTEN
Optional
SCL
SDA
ID[x]
RIN+
RIN-
DS99R124Q
Converter
TxOUT2+/-
TxOUT1+/-
TxOUT0+/-
TxCLKOUT+/-
OS[2:0]
LOCK
PASS
PDB
VODSEL
OEN
OSSEL
RGB Display
QVGA to WVGA
18-bit Color Depth
DS99R124Q Pin Diagram
Figure 1.
RES[1] 37
VDDA 38
GND 39
RIN+ 40
RIN- 41
CMF 42
VDDA 43
GND 44
GND 45
VDDP 46
VDDP 47
GND 48
DS99R124Q
TOP VIEW
DAP = GND
24 TxOUT0-
23 TxOUT0+
22 TxOUT1-
21 TxOUT1+
20 TxOUT2-
19 TxOUT2+
18 TxCLKOUT-
17 TxCLKOUT+
16 ID[x]
15 RES[0]
14 GND
13 VDDTX
Figure 2. FPD-Link II to FPD-Link Convertor - DS99R124Q
48 Pin WQFN Package
See Package Number RHS0048A
2 Submit Documentation Feedback
Product Folder Links: DS99R124Q
Copyright © 2010–2013, Texas Instruments Incorporated







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