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DAC5689 Dataheets PDF



Part Number DAC5689
Manufacturers Texas Instruments
Logo Texas Instruments
Description DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER
Datasheet DAC5689 DatasheetDAC5689 Datasheet (PDF)

DAC5689 www.ti.com SLLS989A – SEPTEMBER 2009 – REVISED AUGUST 2010 16-BIT, 800 MSPS 2x–8x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC) Check for Samples: DAC5689 FEATURES 1 • Dual, 16-Bit, 800 MSPS DACs • Dual, 16-Bit, 250 MSPS CMOS Input Data – 16 Sample Input FIFO – Flexible Input Data Bus Options • High Performance – 81 dBc ACLR WCDMA TM1 at 70 MHz • Selectable 2x–8x Interpolation Filters – Stop-band Attenuation > 80 dB • Complex Mixer with 32-Bit NCO • Digital Quadrature M.

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DAC5689 www.ti.com SLLS989A – SEPTEMBER 2009 – REVISED AUGUST 2010 16-BIT, 800 MSPS 2x–8x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC) Check for Samples: DAC5689 FEATURES 1 • Dual, 16-Bit, 800 MSPS DACs • Dual, 16-Bit, 250 MSPS CMOS Input Data – 16 Sample Input FIFO – Flexible Input Data Bus Options • High Performance – 81 dBc ACLR WCDMA TM1 at 70 MHz • Selectable 2x–8x Interpolation Filters – Stop-band Attenuation > 80 dB • Complex Mixer with 32-Bit NCO • Digital Quadrature Modulator Correction – Gain, Phase and Offset Correction • Digital Inverse SINC Filter • 3- or 4-Wire Serial Control Interface • On Chip 1.2-V Reference • Differential Scalable Output: 2 to 20 mA • Package: 64-pin 9×9mm QFN APPLICATIONS • Cellular Base Stations • Broadband Wireless Access (BWA) • WiMAX 802.16 • Fixed Wireless Backhaul • Cable Modem Termination System (CMTS) DESCRIPTION The DAC5689 is a dual-channel 16-bit 800 MSPS digital-to-analog converter (DAC) with dual CMOS digital data bus, integrated 2x-8x interpolation filters, a fine frequency mixer with 32-bit complex numerically controlled oscillator (NCO), IQ compensation, and internal voltage reference. Different modes of operation enable or bypass various signal processing blocks. The DAC5689 offers superior linearity, noise and crosstalk performance. The DAC5689 dual CMOS data bus provides 250 MSPS input data transfer per DAC channel. Several input data options are available: dual-bus data, single-bus interleaved data, even and odd multiplexing at half-rate, and an input FIFO with either external or internal clock to ease interface timing. Input data can be interpolated 2x, 4x or 8x by on-board digital interpolating FIR filters with over 80 dB of stop-band attenuation. The DAC5689 allows both complex or real output. An optional 32-bit NCO/mixer in complex mode provides frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. A digital Inverse SINC filter compensates for the natural DAC sin(x)/x frequency roll-off. The digital Quadrature Modulator Correction (QMC) feature allows IQ compensation of phase, gain and offset to maximize sideband rejection and minimize LO feed-through of an external quadrature modulator performing the final single sideband RF up-conversion. The DAC5689 is pin upgradeable to the DAC5688 which includes a clock multiplying PLL. The DAC5689 is characterized for operation over the industrial temperature range of -40°C to 85°C and is available in a 64-pin 9x9mm QFN package. ORDER CODE TA = –40°C to 85°C DAC5689IRGCT DAC5689IRGCR ORDERING INFORMATION(1) (2) PACKAGE QTY TAPE AND REEL FORMAT 250 2000 PACKAGE DRAWING/TYPE(3) (4) RGC / 64QFN Quad FlatpackNo-Lead (1) For correct DAC5689 operation, bits [1:0] in register CONFIG26 need to be set to "10" at device startup (see Recommended Startup Sequence). (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. (3) Thermal Pad Size: 7,4 mm × 7,4 mm (4) MSL Peak Temperature: Level-3-260C-168 HR 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2010, Texas Instruments Incorporated DAC5689 SLLS989A – SEPTEMBER 2009 – REVISED AUGUST 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Input FIFO / Demux Full Mixer (FMIX) Quadrature Modulator Correction (QMC): Phase & Gain FUNCTIONAL BLOCK DIAGRAM CLK2 CLK2C CLKO_CLK1 CLK1C SYNC TXENABLE CLKVDD CLKOUT Internal Clock Generation FIR1 FIR2 FIR3 DA[15:0] x2 x2 x2 67 taps 2x – 8x Interpolation 19 taps 11 taps DB[15:0] x2 x2 x2 RESETB SIF Control cos sin 32-bit NCO VFUSE DVDD 2-8x Fdata 1.2 V Reference FIR4 x sin(x) A QMC A-Offset gain 16-b DAC EXTIO EXTLO BIASJ IOUTA1 IOUTA2 9 taps x sin(x) 16-b DAC IOUTB1 IOUTB2 QMC B-Offset B gain AVDD PINOUT SDIO SDO SDENB SCLK IOVDD GND NC DVDD AVDD IOUTB1 IOUTB2 AVDD EXTLO BIASJ EXTIO AVDD AVDD IOUTA2 IOUTA1 AVDD DVDD RESETB 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 CLKVDD CLK2 CLK2C GND SYNC TXENABLE DA15.


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