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DAC38RF80, DAC38RF83, DAC38RF84 DAC38RF85, DAC38RF90, DAC38RF93
SLASEA3C – DECEMBER 2016 – REVISED JULY 2017
DAC38RFxx Dual- or Single-Channel, Single-Ended or Differential Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip PLL
1 Features
•1 14-Bit Resolution • Maximum DAC Sample Rate: 9 GSPS • Key Specifications:
– RF Full-Scale Output Power at 2.1 GHz: – DAC38RF80/90/84: 0 dBm – DAC38RF83/93/85: 3 dBm (with 2:1 balun)
– Spectral Performance(on-chip PLL, DIFF): – fDAC = 5898.24 MSPS, fOUT = 2.14 GHz – WCDMA ACLR: 75 dBc – WCDMA alt-ACLR: 77 dBc – fDAC = 8847.36 MSPS, fOUT = 3.7 GHz – 20 MHz LTE ACLR: 63 dBc – fDAC = 9 GSPS, fOUT = 1.8 GHz – IMD3 = 70 dBc (–6 dBFS, 10-MHz tone spacing) – NSD = –157 dBc/Hz
• Dual-Band Digital Up-converter per DAC – 6, 8, 10, 12, 16, 18, 20 or 24x Interpolation – 4 Independent NCOs With 48-Bit Resolution
• JESD204B Interface, Subclass 1 – Support for Multichip Synchronization – Maximum Lane Rate: 12.5 Gbps
• Single-Ended Output With Integrated Balun (DAC38RF80/90/84) Covering 700 MHz to 3800 MHz
• Internal PLL and VCO With Bypass – fC(VCO) = 5.9 or 8.9 GHz
• Power Dissipation: 1.4 to 2.2 W/ch • Power Supplies: –1.8 V, 1 V, 1.8 V • Package: 10 x 10 mm BGA, 0.8 mm Pitch, 144-
Balls
3 Description
The DAC38RFxx is a family of high-performance, dual/single-channel, 14-bit, 9-GSPS, RF-sampling digital-to-analog converters (DACs) that are capable of synthesizing wideband signals from 0 to 4.5 GHz. A high dynamic range allows the DAC38RFxx family to generate signals for a wide range of applications including 3G/4G signals for wireless base-stations and radar.
The devices feature a low-power JESD204B Interface with up to 8 lanes with a maximum bit rate of 12.5 Gbps allowing an input data rate of 1.25 GSPS complex per channel. The DAC38RFxx provides two digital up-converters per channel, with multiple options for interpolation rates. A digital quadrature modulator with independent, frequency flexible NCOs are available to support multi-band operation. An optional low-jitter PLL/VCO simplifies the DAC sampling clock generation by allowing use of a lower frequency reference clock.
Device Information(1)
PART NUMBER
OUTPUT TYPE
NUMBER OF CHANNELS
DAC38RF83
2
DAC38RF93
Differential
2
DAC38RF85
1
DAC38RF80
2
DAC38RF90
Single ended
2
DAC38RF84
1
(1) For all available device options, see the Device Comparison Table.
2x20-MHz LTE at 1.84 GHz and 2.14 GHz, 800 MHz Span
2 Applications
• Wireless Communications • Communications Test Equipment • Arbitrary Waveform Generators • Military Software Defined Radios • Radar and Satellite Communications (SATCOM)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
DAC38RF80, DAC38RF83, DAC38RF84 DAC38RF85.