Step-Down Converter. TPS54010 Datasheet

TPS54010 Converter. Datasheet pdf. Equivalent


etcTI TPS54010
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
TPS54010
SLVS509C – MAY 2004 – REVISED JUNE 2019
TPS54010 3-V to 4-V Input, 14-A Synchronous Step-Down Converter
1 Features
1 Separate Low-Voltage Power Bus
• 8-mMOSFET Switches for High Efficiency at
14-A Continuous Output
• Adjustable Output Voltage Down to 0.9 V
• Externally Compensated With 1% Internal
Reference Accuracy
• Fast Transient Response
• Wide PWM Frequency:
Adjustable 280 kHz to 700 kHz
• Load Protected by Peak Current Limit and
Thermal Shutdown
• Integrated Solution Reduces Board Area and
Total Cost
2 Applications
• Low-Voltage, High-Density Systems With Power
Distributed at 2.5 V, 3.3 V Available
• Point of Load Regulation for High-
Performance DSPs, FPGAs, ASICs, and
Microprocessors
• Broadband, Networking, and Optical
Communications Infrastructure
3 Description
The TPS54010 low-input voltage, high-output current
synchronous buck PWM converter in a dc/dc
regulator integrating all required active components.
Included on the substrate with the listed features are
a true, high- performance, voltage error amplifier that
enables maximum performance under transient
conditions and flexibility in choosing the output filter L
and C components; an undervoltage-lockout circuit to
prevent start-up until the VIN input voltage reaches 3
V; an internally and externally set slowstart circuit to
limit in-rush currents; and a power-good output useful
for processor/logic reset, fault signaling, and supply
sequencing.
The TPS54010 is available in a thermally enhanced
28-pin TSSOP (PWP) PowerPAD™ package, which
eliminates bulky heat sinks.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPS54010
HTSSOP (28)
9.70 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
space
space
space
Typical Application and Efficiency Curve
SIMPLIFIED SCHEMATIC
2.5 V or 3.3 V
Input1
350 mF
PVIN
PH
TPS54010
BOOT
Input2
3.3 V
VIN
PGND
COMP
0.68 mH
0.047 mF 200 mF 0.1 mF
120 pF
1 mF
VBIAS
4.64 kW
10 kW
Output
AGND VSENSE
3300 pF
422 W
1 mF
14.7 kW
1500 pF
Compensation
Network
100
95
90
85
80
75
70
65
60
55
50
0
EFFICIENCY
vs
OUTPUT CURRENT
VIN = 3.3 V,
PVIN = 2.5 V,
VO = 1.5 V,
fs= 700 kHz
2 4 6 8 10 12 14 16
IO − Output Current − A
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.


TPS54010 Datasheet
Recommendation TPS54010 Datasheet
Part TPS54010
Description 14-A Synchronous Step-Down Converter
Feature TPS54010; Product Folder Order Now Technical Documents Tools & Software Support & Community TPS54010 SLVS.
Manufacture etcTI
Datasheet
Download TPS54010 Datasheet




etcTI TPS54010
TPS54010
SLVS509C – MAY 2004 – REVISED JUNE 2019
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Dissipation Ratings .................................................. 4
6.5 Electrical Characteristics.......................................... 5
6.6 Typical Characteristics .............................................. 7
7 Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................... 9
8 Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Application ................................................. 14
9 Layout ................................................................... 26
9.1 PCB Layout ............................................................. 26
9.2 Layout Example ...................................................... 28
10 Device and Documentation Support ................. 29
10.1 Device Support...................................................... 29
10.2 Receiving Notification of Documentation Updates 29
10.3 Community Resources.......................................... 29
10.4 Trademarks ........................................................... 29
10.5 Electrostatic Discharge Caution ............................ 29
10.6 Glossary ................................................................ 29
11 Mechanical, Packaging, and Orderable
Information ........................................................... 29
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (June 2005) to Revision C
Page
• Editorial changes only, no technical revisions; ...................................................................................................................... 1
• remove Ordering Information table; information in POA ....................................................................................................... 1
2 Submit Documentation Feedback
Product Folder Links: TPS54010
Copyright © 2004–2019, Texas Instruments Incorporated



etcTI TPS54010
www.ti.com
5 Pin Configuration and Functions
AGND
VSENSE
COMP
PWRGD
BOOT
PH
PH
PH
PH
PH
PH
PH
PH
PH
PWP Package
28-Pin HTSSOP
Top View
1 28
2 27
3 26
4 25
5 24
6 23
7 THERMAL 22
8 PAD 21
9 20
10 19
11 18
12 17
13 16
14 15
TPS54010
SLVS509C – MAY 2004 – REVISED JUNE 2019
RT
SYNC
SS/ENA
VBIAS
VIN
PVIN
PVIN
PVIN
PVIN
PGND
PGND
PGND
PGND
PGND
NAME
AGND
BOOT
COMP
PGND
PH
PVIN
PWRGD
RT
SS/ENA
SYNC
VBIAS
VIN
VSENSE
PIN
NO.
1
5
3
15, 16, 17, 18,
19
6-14
20, 21, 22, 23
4
28
26
27
25
24
2
Pin Functions
DESCRIPTION
Analog ground. Return for compensation network/output divider, slow-start capacitor, VBIAS capacitor, and
RT resistor. If using the PowerPAD, connect it to AGND. See the Application Information section for
details.
Bootstrap output. 0.022-µF to 0.1-µF low-ESR capacitor connected from BOOT to PH generates floating
drive for the high-side FET driver.
Error amplifier output. Connect frequency compensation network from COMP to VSENSE
Power ground. High current return for the low-side driver and power MOSFET. Connect PGND with large
copper areas to the input and output supply returns, and negative terminals of the input and output
capacitors. A single point connection to AGND is recommended.
Phase output. Junction of the internal high-side and low-side power MOSFETs, and output inductor.
Input supply for the power MOSFET switches and internal bias regulator. Bypass the PVIN pins to the
PGND pins close to device package with a high-quality, low-ESR 10-µF ceramic capacitor.
Power-good open-drain output. High when VSENSE > 90% Vref, otherwise PWRGD is low. Note that
output is low when SS/ENA is low or the internal shutdown signal is active.
Frequency setting resistor input. Connect a resistor from RT to AGND to set the switching frequency, fs.
Slow-start/enable input/output. Dual function pin which provides logic input to enable/disable device
operation and capacitor input to externally set the start-up time.
Synchronization input. Dual function pin which provides logic input to synchronize to an external oscillator
or pin select between two internally set switching frequencies. When used to synchronize to an external
signal, a resistor must be connected to the RT pin.
Internal bias regulator output. Supplies regulated voltage to internal circuitry. Bypass VBIAS pin to AGND
pin with a high-quality, low-ESR 0.1-µF to 1.0-µF ceramic capacitor.
Input supply for the internal control circuits. Bypass the VIN pin to the PGND pins close to device package
with a high-quality, low-ESR 1-µF ceramic capacitor.
Error amplifier inverting input. Connect to output voltage compensation network/output divider.
Copyright © 2004–2019, Texas Instruments Incorporated
Product Folder Links: TPS54010
Submit Documentation Feedback
3







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)