Linear Repeater. DS280BR820 Datasheet

DS280BR820 Repeater. Datasheet pdf. Equivalent


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DS280BR820
SNLS544B – SEPTEMBER 2016 – REVISED OCTOBER 2019
DS280BR820 Low Power 28 Gbps 8 Channel Linear Repeater
1 Features
1 Octal-Channel Multi-Protocol Linear Equalizer
Supporting up to 28 Gbps Interfaces
• Low Power Consumption: 93 mW / Channel
(Typical)
• No Heat Sink Required
• Linear Equalization for Seamless Support of Link
Training, Auto-Negotiation, and FEC Pass-
Through
• Extends Channel Reach by 17 dB+ Beyond
Normal ASIC-to-ASIC Capability
• Ultra-Low Latency: 100 ps (Typical)
• Low Additive Random Jitter
• Small 8-mm x 13-mm BGA Package with
Integrated RX AC Coupling Capacitors for Easy
Flow-Through Routing
• Unique Pinout Allows Routing High-Speed Signals
Underneath the Package
• Pin-Compatible Retimer Available
• Single 2.5-V ±5% Power Supply
• –40°C to +85°C Operating Temperature Range
2 Applications
Backplane and Mid-Plane Reach Extension
• Front-Port Eye Opener for Optical and Passive
Copper (100G-SR4/LR4/CR4)
• QSFP28, SFP28, CFP2, CFP4, CDFP
3 Description
The DS280BR820 is an extremely low-power, high-
performance eight-channel linear equalizer supporting
multi-rate, multi-protocol interfaces up to 28 Gbps. It
is used to extend the reach and improve the
robustness of high-speed serial links for backplane,
front-port, and chip-to-chip applications.
The linear nature of the DS280BR820’s equalization
preserves the transmit signal characteristics, thereby
allowing the host and link partner ASICs to freely
negotiate transmit equalizer coefficients (100G-
CR4/KR4). This transparency to the link training
protocol facilitates system-level interoperability with
minimal effect on the latency. Each channel operates
independently, which allows the DS280BR820 to
support individual lane Forward Error Correction
(FEC) pass-through.
The DS280BR820's small package dimensions,
optimized high-speed signal escape, and the pin-
compatible Retimer portfolio make the DS280BR820
ideal for high-density backplane applications.
Simplified equalization control, low power
consumption, and ultra-low additive jitter make it
suitable for front-port interfaces such as 100G-
SR4/LR4/CR4. The small 8-mm x 13-mm footprint
easily fits behind numerous standard front-port
connectors like QSFP, SFP, CFP2, CFP4, and CDFP
without the need for a heat sink.
Integrated AC coupling capacitors (RX side) eliminate
the need for external capacitors on the PCB. The
DS280BR820 has a single power supply and minimal
need for external components. These features reduce
PCB routing complexity and bill of materials (BOM)
cost.
A pin-compatible Retimer device is available for
longer reach applications.
The DS280BR820 can be configured either through
the SMBus or through an external EEPROM. Up to
16 devices can share a single EEPROM.
Device Information (1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DS280BR820
nFBGA (135)
8.0 mm x 13.0 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
RX0P
RX0N
.
.
.
VDD
.
.
.
RX7P
RX7N
SMBus
Slave mode
1
EN_SMB
.
.
.
TX0P
TX0N
.
.
.
TX7P
TX7N
SDA(1)
SDC(1)
ADDR0
ADDR1
SMBus Slave
mode
2.5 V
1F
(2x)
0.1 F
(4x)
READ_EN_N
VDD
ALL_DONE_N
GND
.
.
.
To system SMBus
Address straps
(pull-up, pull-down, or float)
Float for SMBus Slave
mode, or connect to next
GHYLFH¶V 5($'_EN_N for
SMBus Master mode
(1) SMBus signals need to be pulled up elsewhere in the system.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.


DS280BR820 Datasheet
Recommendation DS280BR820 Datasheet
Part DS280BR820
Description Low Power 28 Gbps 8 Channel Linear Repeater
Feature DS280BR820; Product Folder Order Now Technical Documents Tools & Software Support & Community DS280BR820 SN.
Manufacture etcTI
Datasheet
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etcTI DS280BR820
DS280BR820
SNLS544B – SEPTEMBER 2016 – REVISED OCTOBER 2019
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 6
6.1 Absolute Maximum Ratings ...................................... 6
6.2 ESD Ratings.............................................................. 6
6.3 Recommended Operating Conditions....................... 6
6.4 Thermal Information .................................................. 7
6.5 Electrical Characteristics........................................... 7
6.6 Electrical Characteristics – Serial Management Bus
Interface ................................................................... 12
6.7 Timing Requirements – Serial Management Bus
Interface ................................................................... 12
6.8 Typical Characteristics ............................................ 13
7 Detailed Description ............................................ 14
7.1 Overview ................................................................. 14
7.2 Functional Block Diagram ....................................... 14
7.3 Feature Description................................................. 15
7.4 Device Functional Modes........................................ 17
7.5 Programming........................................................... 18
7.6 Register Maps ........................................................ 19
8 Application and Implementation ........................ 29
8.1 Application Information............................................ 29
8.2 Typical Applications ............................................... 29
8.3 Initialization Set Up ................................................ 41
9 Power Supply Recommendations...................... 41
10 Layout................................................................... 42
10.1 Layout Guidelines ................................................. 42
10.2 Layout Examples................................................... 42
11 Device and Documentation Support ................. 45
11.1 Documentation Support ........................................ 45
11.2 Receiving Notification of Documentation Updates 45
11.3 Trademarks ........................................................... 45
11.4 Electrostatic Discharge Caution ............................ 45
11.5 Glossary ................................................................ 45
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (October 2017) to Revision B
Page
• Initial Public Release ............................................................................................................................................................. 1
2 Submit Documentation Feedback
Copyright © 2016–2019, Texas Instruments Incorporated
Product Folder Links: DS280BR820



etcTI DS280BR820
www.ti.com
DS280BR820
SNLS544B – SEPTEMBER 2016 – REVISED OCTOBER 2019
5 Pin Configuration and Functions
Top View
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
J GND GND TX1N GND TX2N GND TX3N GND TX4N GND TX5N GND TX6N GND GND J
GND Ground pin
H TX0N GND TX1P GND TX2P GND TX3P GND TX4P GND TX5P GND TX6P GND TX7N H
High-speed pin
G TX0P GND GND GND GND GND GND GND GND GND GND GND GND GND TX7P G
F GND
CAL_
E CLK_
OUT
GND
READ
_EN_
N
TEST ADDR
11
SDC
SDA
D GND
GND
ADDR
0
GND
GND
GND
GND
VDD
VDD
VDD
GND
VDD
GND
VDD
VDD
VDD
GND
VDD
GND
VDD
VDD
VDD
GND
VDD
GND
GND
INT_N
(NC)
GND
GND F
GND
GND
EN_S TEST
MB 0
ALL_
DONE
_N
GND
CAL_
CLK_ E
IN
GND D
C RX0P GND GND GND GND GND GND GND GND GND GND GND GND GND RX7P C
VDD Power pin
Control/Status pin
No connect on
package
Test pin
B RX0N GND RX1P GND RX2P GND RX3P GND RX4P GND RX5P GND RX6P GND RX7N B
A GND GND RX1N GND RX2N GND RX3N GND RX4N GND RX5N GND RX6N GND GND A
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
NAME
PIN
NO.
I/O
HIGH SPEED DIFFERENTIAL I/O
RX0N
B15 Input
RX0P
C15 Input
RX1N
A13 Input
RX1P
B13 Input
RX2N
A11 Input
RX2P
B11 Input
RX3N
A9 Input
RX3P
B9 Input
RX4N
A7 Input
RX4P
B7 Input
RX5N
A5 Input
RX5P
B5 Input
RX6N
A3 Input
RX6P
B3 Input
RX7N
B1 Input
RX7P
C1 Input
TX0N
TX0P
TX1N
TX1P
H15 Output
G15 Output
J13 Output
H13 Output
Pin Functions
DESCRIPTION
Inverting and non-inverting differential inputs to the equalizer. An on-chip 100-Ω termination
resistor connects RXP to RXN. These inputs are AC coupled with 220-nF capacitors
assembled on the package substrate.
Inverting and non-inverting differential inputs to the equalizer. An on-chip 100-Ω termination
resistor connects RXP to RXN. These inputs are AC coupled with 220-nF capacitors
assembled on the package substrate.
Inverting and non-inverting differential inputs to the equalizer. An on-chip 100-Ω termination
resistor connects RXP to RXN. These inputs are AC coupled with 220-nF capacitors
assembled on the package substrate.
Inverting and non-inverting differential inputs to the equalizer. An on-chip 100-Ω termination
resistor connects RXP to RXN. These inputs are AC coupled with 220-nF capacitors
assembled on the package substrate.
Inverting and non-inverting differential inputs to the equalizer. An on-chip 100-Ω termination
resistor connects RXP to RXN. These inputs are AC coupled with 220-nF capacitors
assembled on the package substrate.
Inverting and non-inverting differential inputs to the equalizer. An on-chip 100-Ω termination
resistor connects RXP to RXN. These inputs are AC coupled with 220-nF capacitors
assembled on the package substrate.
Inverting and non-inverting differential inputs to the equalizer. An on-chip 100-Ω termination
resistor connects RXP to RXN. These inputs are AC coupled with 220-nF capacitors
assembled on the package substrate.
Inverting and non-inverting differential inputs to the equalizer. An on-chip 100-Ω termination
resistor connects RXP to RXN. These inputs are AC coupled with 220-nF capacitors
assembled on the package substrate.
Inverting and non-inverting 50-driver outputs. Compatible with AC-coupled differential
inputs.
Inverting and non-inverting 50-driver outputs. Compatible with AC-coupled differential
inputs.
Copyright © 2016–2019, Texas Instruments Incorporated
Product Folder Links: DS280BR820
Submit Documentation Feedback
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