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DS28C50

Maxim Integrated

I2C Secure SHA-3 Authenticator

Click here for production status of specific part numbers. DS28C50 DeepCover® I2C Secure SHA-3 Authenticator with Chi...


Maxim Integrated

DS28C50

File Download Download DS28C50 Datasheet


Description
Click here for production status of specific part numbers. DS28C50 DeepCover® I2C Secure SHA-3 Authenticator with ChipDNA PUF Protection General Description The DS28C50 secure authenticator combines FIPS202-compliant secure hash algorithm (SHA-3) challenge and response authentication with Maxim’s patented ChipDNA™ technology, a physically unclonable function (PUF) to provide a cost-effective solution with the ultimate protection against security attacks. The ChipDNA implementation utilizes the random variation of semiconductor device characteristics that naturally occur during wafer fabrication. The ChipDNA circuit generates a unique output value that is repeatable over time, temperature, and operating voltage. Attempts to probe or observe ChipDNA operation modifies the underlying circuit characteristics, thus preventing discovery of the unique value used by the chip cryptographic functions. The DS28C50 utilizes the ChipDNA output as key content to cryptographically secure all device-stored data. With ChipDNA capability, the device provides a core set of cryptographic tools derived from integrated blocks including a SHA-3 engine, a FIPS/ NIST compliant true random number generator (TRNG), 2Kb of secured EEPROM, a decrement-only counter and a unique 64-bit ROM identification number (ROM ID). The unique ROM ID is used as a fundamental input parameter for cryptographic operations and serves as an electronic serial number within the application. The DS28C50 communicates over ...




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