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Am386®SX/SXL/SXLV
High-Performance, Low-Power, Embedded Microprocessors
DISTINCTIVE CHARACTERISTICS
s Member of the E86™ CPU series
– 16-bit data bus – 24-bit address bus – 16-Mbyte address range – Long-term stable supply from AMD s 40-, 33- and 25-MHz operating speeds s Ideal for embedded applications
– True Static design for low-power applications – 3–5 V operation (at 25 MHz) – Ideal for cost-sensitive designs – True DC (0 MHz) operation s Industry Standard Architecture
– Supports world’s largest software base for x86 architectures
– Wide range of chipsets and BIOS available
GENERAL DESCRIPTION
The Am386®SX/SXL/SXLV microprocessors are lowcost, high-performance CPUs for embedded applications. Embedded customers benefit from using the Am386 microprocessor in a number of ways.
The Am386SX/SXL/SXLV microprocessors provide embedded customers access to very inexpensive processors and the highest performance of any 386SX available anywhere. The 16-bit data path allows for inexpensive memory design. Full static operation, coupled with 3-V supplies, benefit customers who desire low-power designs. Standby Mode allows the Am386SXL/SXLV microprocessors to be clocked down to 0 MHz (DC) and retain full register contents. A float pin places all outputs in a three-state mode to facilitate board test and debug.
Additionally, the Am386SXLV microprocessor comes
mwith System Management Mode (SMM) for system and opower management. SMI (System Management Inter.crupt) is a non-maskable, higher priority interrupt than UNMI and has its own code space (1 Mbyte in Real www.DataSheet4Mode and 16 Mbyte in Protected Mode). SMI can be
– Fully compatible with all 386SX systems and software
s System Management Mode (SMM) for system and power management (Am386SXLV only) – System Management Interrupt (SMI) for power management independent of processor operating mode and operating system – SMI coupled with I/O instruction break feature provides transparent power off and auto resume of peripherals which may not be “power aware” – SMI is non-maskable and has higher priority than Non-Maskable Interrupt (NMI) – Automatic save and restore of the microprocessor state
s 100-lead Plastic Quad Flat Pack (PQFP) package s Extended temperature version available
coupled with the I/O instruction break feature to implement transparent power management of peripherals. SMM can be used by system designers to implement system and power management code independent of the operating system or the processor mode. Since the Am386SX/SXL/SXLV microprocessors are supported as an embedded product in the E86 family, customers can rely on long-term supply of product, and extended temperature products. In addition, customers have access to the largest selection of inexpensive development tools, compilers, and chipsets. A large number of PC operating systems and Real Time Operating Systems (RTOS) support the Am386SX/SXL/SXLV microprocessors. This means cheaper development costs, and improved time to market. The Am386SX/SXL/SXLV microprocessor is available in a small footprint 100-pin Plastic Quad Flat Pack (PQFP) package.
Publication# 21020 Rev: A Amendment/0 Issue Date: April 1997
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ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below.
I NG 80386 SX –40
SPEED OPTION –40 = 40 MHz –33 = 33 MHz –25 = 25 MHz
PROCESSOR TYPE SX = SX Processor SXL = SX Processor with Static Clock Implementation SXLV = SXL Processor with Low-Voltage and SMI
PROCESSOR FAMILY Am386 Family
PACKAGE TYPE NG=100-Lead Plastic Quad Flat Pack (PQB-100)
TEMPERATURE RANGE Blank = Commercial (TCASE = 0°C to +100°C)
I = Industrial (TCASE = –40°C to +100°C)
Valid Combinations
Valid Combinations
–25 Valid Combinations lists configurations
NG80386 SX
–33
planned to be supported in volume for this device. Consult the local AMD sales office
–40 to confirm availability of specific valid
–25 SXL
–33
combinations and to check on newly released combinations.
SXLV
omING80386 SX
–25 –25
www.DataSheet4U.c2 Am386SX/SXL/SXLV Microprocessors Data Sheet
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BLOCK DIAGRAM
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Effective Address Bus Effective Address Bus
Protection Test Unit
Segmentation Unit
Paging Unit
3-Input
Adder 32
Adder
Descriptor
32 Page
32 Registers
Cache
Limit and Attribute
PLA
Control and
Attribute
PLA
Displacement Bus Linear Address Bus
Internal Control Bus
Barrel Shifter, Adder
Multiply/ Divide
Status Flags
Register File
ALU Control
Decode and
Sequencing
Control ROM
Control
ALU
* – On Am386SXLV only
Instruction Decoder
Prefetcher/ Limit
Checker
Code 3-Decoded Stream Instruction
Queue 32 Bit
16-Byte Code Queue
Instruction Predecode
Instruction Prefetch
Dedicated ALU Bus
Code Fetch/Page Table Fetch
Bus Control HOL.