N-Ch FET. FDS6900AS Datasheet

FDS6900AS FET. Datasheet pdf. Equivalent

FDS6900AS Datasheet
Recommendation FDS6900AS Datasheet
Part FDS6900AS
Description Dual N-Ch FET
Feature FDS6900AS; FDS6900AS FDS6900AS Dual N-Ch PowerTrench® SyncFET™ General Description The FDS6900AS is designed t.
Manufacture ON Semiconductor
Datasheet
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ON Semiconductor FDS6900AS
FDS6900AS
Dual N-Ch PowerTrench® SyncFET
General Description
The FDS6900AS is designed to replace two single SO-
8 MOSFETs and Schottky diode in synchronous DC:DC
power supplies that provide various peripheral voltages
for notebook computers and other battery powered
electronic devices. FDS6900AS contains two unique
30V, N-channel, logic level, PowerTrench MOSFETs
designed to maximize power conversion efficiency.
The high-side switch (Q1) is designed with specific
emphasis on reducing switching losses while the low-
side switch (Q2) is optimized to reduce conduction
losses. Q2 also includes an integrated Schottky diode
using ON Semiconductor’s monolithic SyncFET
technology.
Features
Q2: Optimized to minimize conduction losses
Includes SyncFET Schottky body diode
8.2A, 30V
RDS(on) = 22m@ VGS = 10V
RDS(on) = 28m@ VGS = 4.5V
Q1: Optimized for low switching losses
Low Gate Charge (11nC typical)
6.9A, 30V
RDS(on) = 27m@ VGS = 10V
RDS(on) = 34m@ VGS = 4.5V
100% RG (Gate Resistance) Tested
SD1D2
SD1D2
SD1D2
DG1
SO-8
Pin 1 SO-
DS1DS1 GS2SG2
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDSS
VGSS
ID
PD
TJ, TSTG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
(Note 1a)
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS6900AS
FDS6900AS
13”
FDS6900AS
FDS6900AS-NL (Note 4)
13”
©2005 Semiconductor Components Industries, LLC.
Septemeber-2017, Rev. 2
1
2 Q1
3
Q2
4
8
7
6
5
Dual N-Channel SyncFet
Q2 Q1
30 30
±20 ±20
8.2 6.9
30 20
2
1.6
1
0.9
–55 to +150
Units
V
V
A
W
°C
78 °C/W
40 °C/W
Tape width
12mm
12mm
Quantity
2500 units
2500 units
Publication Order Number:
FDS6900AS/D



ON Semiconductor FDS6900AS
Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Off Characteristics
BVDSS
Drain-Source Breakdown
Voltage
BVDSS
TJ
IDSS
Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain
Current
IGSS Gate-Body Leakage
VGS = 0 V, ID = 1 mA
VGS = 0 V, ID = 250 uA
ID = 10 mA, Referenced to 25°C
ID = 250 µA, Referenced to 25°C
VDS = 24 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
VGS(th)
TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain-Source
On-Resistance
ID(on)
On-State Drain Current
VDS = VGS,
VDS = VGS,
ID = 1 mA
ID = 250 µA
ID = 10 mA, Referenced to 25°C
ID = 250 uA, Referenced to 25°C
VGS = 10 V, ID = 8.2 A
VGS = 10 V, ID = 8.2 A, TJ = 125°C
VGS = 4.5 V, ID = 7.6 A
VGS = 10 V, ID = 6.9 A
VGS = 10 V, ID = 6.9 A, TJ = 125°C
VGS = 4.5 V, ID = 6.2 A
VGS = 10 V, VDS = 5 V
gFS Forward Transconductance
Dynamic Characteristics
Ciss Input Capacitance
Coss Output Capacitance
VDS = 5 V,
VDS = 5 V,
ID = 8.2 A
ID = 6.9 A
VDS = 15 V, VGS = 0 V,
f = 1.0 MHz
Crss Reverse Transfer Capacitance
RG Gate Resistance
Type Min Typ Max Units
Q2 30
Q1 30
V
Q2 27 mV/°C
Q1 22
Q2 500 µA
Q1 1
Q2 ±100 nA
Q1
Q2 1 1.9 3
Q1 1 1.9 3
V
Q2 –3.2 mV/°C
Q1 –4.2
Q2 17 22
23 36
21 28
Q1 22 27
30 38
27 34
Q2 30
Q1 20
Q2 25
Q1 21
m
A
S
Q2 570
pF
Q1 600
Q2 180
pF
Q1 150
Q2 70
pF
Q1 70
Q2
2.8 4.9
Q1 2.2 3.8
Switching Characteristics (Note 2)
td(on) Turn-On Delay Time
tr Turn-On Rise Time
td(off) Turn-Off Delay Time
VDD = 15 V, ID = 1 A,
VGS = 10V, RGEN = 6
tf Turn-Off Fall Time
td(on) Turn-On Delay Time
tr Turn-On Rise Time
td(off) Turn-Off Delay Time
VDD = 15 V, ID = 1 A,
VGS = 4.5 V, RGEN = 6
tf Turn-Off Fall Time
Q2
10 19
ns
Q1 9 18
Q2
5 10
ns
Q1 4 8
Q2
26 42
ns
Q1 23 32
Q2
36
ns
Q1 3 6
Q2
11 20
ns
Q1 10 19
Q2
15 27
ns
Q1 9 18
Q2
16 29
ns
Q1 14 25
Q2
6 12
ns
Q1 4 8
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ON Semiconductor FDS6900AS
Electrical Characteristics (continued)
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min Typ Max Units
Switching Characteristics (Note 2)
Qg(TOT)
Qg
Total
Gate
Charge
at
Vgs=10V
Q2:
VDS =
15
V,
ID
=
8.2A
Q1:
Total Gate Charge at Vgs=5V VDS = 15 V, ID = 6.9A
Qgs Gate–Source Charge
Qgd Gate–Drain Charge
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current
Q2
Q1
Trr
Reverse Recovery Time
IF = 8.2 A,
Qrr Reverse Recovery Charge diF/dt = 300 A/µs
(Note 3)
Q2
Trr
Reverse Recovery Time
IF = 6.9 A,
Qrr Reverse Recovery Charge diF/dt = 100 A/µs
(Note 3)
Q1
VSD
Drain-Source Diode Forward VGS = 0 V, IS = 2.3 A
(Note 2)
Q2
Voltage
VGS = 0 V, IS = 5 A
(Note 2)
Q2
VGS = 0 V, IS = 1.3 A
(Note 2)
Q1
10 15
11 15
5.8 8.2
6.1 8.5
1.6
1.7
2.1
2.2
nC
nC
nC
nC
2.3
1.3
15
6
19
10
0.6 0.7
0.7 1.0
0.7 1.2
A
ns
nC
ns
nC
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°C/W when
mounted on a
0.5in2 pad of 2
oz copper
b) 125°C/W when
mounted on a
0.02 in2 pad of
2 oz copper
c) 135°C/W when
mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. See “SyncFET Schottky body diode characteristics” below.
4. FDS6900AS-NL is a lead free product. The FDS6900AS-NL marking will appear on the reel label.
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