Headphone Amplifier. TPA6130A2 Datasheet

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TPA6130A2 Datasheet
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Part TPA6130A2
Description Stereo Headphone Amplifier
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TPA6130A2
SLOS488F – NOVEMBER 2006 – REVISED MARCH 2015
TPA6130A2 138-mW DIRECTPATH™ Stereo Headphone Amplifier with I2C Volume Control
1 Features
1 DirectPath™ Ground-Referenced Outputs
– Eliminates Output DC Blocking Capacitors
– Reduces Board Area
– Reduces Component Height and Cost
– Full Bass Response Without Attenuation
• Power Supply Voltage Range: 2.5 V to 5.5 V
• 64 Step Audio Taper Volume Control
• High Power Supply Rejection Ratio
(>100 dB PSRR)
• Differential Inputs for Maximum Noise Rejection
(68 dB CMRR)
• High-Impedance Outputs When Disabled
• Advanced Pop and Click Suppression Circuitry
• Digital I2C Bus Control
– Per Channel Mute and Enable
– Software Shutdown
– Multi-Mode Support: Stereo HP, Dual Mono
HP, and Single-Channel BTL Operation
– Amplifier Status
• Space Saving Packages
– 20 Pin, 4 mm x 4 mm QFN
– 16 ball, 2 mm x 2 mm DSBGA
• ESD Protection of 8 kV HBM and IEC Contact
2 Applications
• Mobile Phones
• Portable Media Players
• Notebook Computers
• High Fidelity Applications
3 Description
The TPA6130A2 is a stereo DirectPath™ headphone
amplifier with I2C digital volume control. The
TPA6130A2 has minimal quiescent current
consumption, with a typical IDD of 4 mA, making it
optimal for portable applications. The I2C control
allows maximum flexibility with a 64 step audio taper
volume control, channel independent enables and
mutes, and the ability to configure the outputs into
stereo, dual mono, or a single receiver speaker BTL
amplifier that drives 300 mW of power into 16
loads.
The TPA6130A2 is a high fidelity amplifier with an
SNR of 98 dB. A PSRR greater than 100 dB enables
direct-to-battery connections without compromising
the listening experience. The output noise of 9 μVrms
(typical A-weighted) provides a minimal noise
background during periods of silence. Configurable
differential inputs and high CMRR allow for maximum
noise rejection in the noisy environment of a mobile
device.
TPA6130A2 packaging includes a 2 by 2 mm chip-
scale package, and a 4 by 4 mm QFN package.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPA6130A2
WQFN (20)
DSBGA (16)
4.00mm x 4.00mm
2.00mm x 2.00mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Simplified Schematic
Audio Source
Left Out M
Left Out P
Right Out M
Right Out P
GPIO
2
IC
0.47 mF
0.47 mF
0.47 mF
0.47 mF
SD
LEFTINM
LEFTINP
RIGHTINM
RIGHTINP
SCL SDA
TPA6130A2
HPLEFT
HPRIGHT
GND
GND
CPP CPN CPVSS VDD VDD
1 mF
1 mF
1 mF 1 mF
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



etcTI TPA6130A2
TPA6130A2
SLOS488F – NOVEMBER 2006 – REVISED MARCH 2015
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Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Simplified Schematic............................................. 1
5 Revision History..................................................... 2
6 Pin Configuration and Functions ......................... 4
7 Specifications......................................................... 5
7.1 Absolute Maximum Ratings ...................................... 5
7.2 Handling Ratings....................................................... 5
7.3 Recommended Operating Conditions....................... 5
7.4 Thermal Information .................................................. 5
7.5 Electrical Characteristics........................................... 6
7.6 Operating Characteristics.......................................... 6
7.7 Timing Requirements ............................................... 7
7.8 Typical Characteristics .............................................. 8
8 Detailed Description ............................................ 14
8.1 Overview ................................................................. 14
8.2 Functional Block Diagram ....................................... 14
8.3 Feature Description................................................. 15
8.4 Device Functional Modes........................................ 16
8.5 Programming........................................................... 18
8.6 Register Maps ......................................................... 21
9 Applications and Implementation ...................... 24
9.1 Application Information............................................ 24
9.2 Typical Application ................................................. 24
10 Power Supply Recommendations ..................... 27
11 Layout................................................................... 27
11.1 Layout Guidelines ................................................. 27
11.2 Layout Example .................................................... 28
12 Device and Documentation Support ................. 30
12.1 Trademarks ........................................................... 30
12.2 Electrostatic Discharge Caution ............................ 30
12.3 Glossary ................................................................ 30
13 Mechanical, Packaging, and Orderable
Information ........................................................... 30
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (September 2014) to Revision F
Page
• Changed type from "R" to "R/W" for all bits in Register Address 1 and 2, and for bits 1 and 0 in Register Address 3 ...... 21
Changes from Revision D (July 2014) to Revision E
Page
• Changed "BALL DSBGA" To "DSBGA NO." in the Pin Functions table ............................................................................... 4
• Changed "PIN WQFN" To "WOFN NO." in the Pin Functions table ..................................................................................... 4
• Added the Programming section .......................................................................................................................................... 18
• Moved the General I2C Operation section through the Multiple-Byte Read section From: Device Functional Modes
To: Programming .................................................................................................................................................................. 18
• Added a NOTE to the Applications and Implementation section ........................................................................................ 24
• Added new paragraph to the Application Information section ............................................................................................. 24
• Deleted title: Simplified Applications Circuit ......................................................................................................................... 24
Changes from Revision C (July 2014) to Revision D
Page
• Changed the datasheet title From: "TAS6130A2 138-mW DIRECTPATH™ .." To: "TPA6130A2 138-mW
DIRECTPATH™.." .................................................................................................................................................................. 1
Changes from Revision B (February 2008) to Revision C
Page
• Added Handling Rating table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section. .............................................................. 1
• Change the Abs Max Input voltage for RIGHTINx, LEFTINx From: –2.7 V to 3.6 V To: –2.5 V to 3.6 V ............................. 5
• Changed TJ in the Abs Max Table From: –40°C to 125°C To: –40°C to 150°C .................................................................... 5
• Added the Thermal Information table ..................................................................................................................................... 5
• Corrected the y-axis scale of Figure 10.................................................................................................................................. 8
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TPA6130A2
SLOS488F – NOVEMBER 2006 – REVISED MARCH 2015
• Changed Figure 45 pin 17 From: CPM To: CPN ................................................................................................................ 24
Changes from Revision A (December 2006) to Revision B
Page
• Changed the YZH package dimensions in the AVAILABLE OPTIONS table From: 16-ball, 2 mm x 2 mm WSCP To:
16-ball, 1,98 mm x 1.98 mm (+0,01mm, –0,09 mm) .............................................................................................................. 5
Changes from Original (November 2006) to Revision A
Page
• Changed Figure 34 Captions From: DirectPath To: Capless and From: Cap-Free to DirectPath ....................................... 15
Copyright © 2006–2015, Texas Instruments Incorporated
Product Folder Links: TPA6130A2
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