SN74LV04A-EP Hex Inverter Datasheet

SN74LV04A-EP Datasheet, PDF, Equivalent


Part Number

SN74LV04A-EP

Description

Hex Inverter

Manufacture

etcTI

Total Page 12 Pages
Datasheet
Download SN74LV04A-EP Datasheet


SN74LV04A-EP
SN74LV04AĆEP
HEX INVERTER
D Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D Extended Temperature Performance of
−40°C to 105°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification
D Qualification Pedigree
D 2-V to 5.5-V VCC Operation
D Max tpd of 7.5 ns at 5 V
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
SCLS563A − JANUARY 2004 − REVISED MAY 2004
D Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
D Supports Mixed-Mode Voltage Operation on
All Ports
D Ioff Supports Partial-Power-Down Mode
Operation
PW PACKAGE
(TOP VIEW)
1A
1Y
2A
2Y
3A
3Y
GND
1
2
3
4
5
6
7
14 VCC
13 6A
12 6Y
11 5A
10 5Y
9 4A
8 4Y
description/ordering information
This hex inverter is designed for 2-V to 5.5-V VCC operation.
The SN74LV04A contains six independent inverters. This device performs the Boolean function Y = A.
The device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE‡
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−40°C to 105°C TSSOP − PW Tape and reel SN74LV04ATPWREP LV04AEP
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
(each inverter)
INPUT OUTPUT
AY
HL
LH
logic diagram, each inverter (positive logic)
AY
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2004, Texas Instruments Incorporated
1

SN74LV04A-EP
SN74LV04AĆEP
HEX INVERTER
SCLS563A − JANUARY 2004 − REVISED MAY 2004
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high-impedance
or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4)
MIN MAX UNIT
VCC Supply voltage
2 5.5 V
VCC = 2 V
1.5
VIH High-level input voltage
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC × 0.7
VCC × 0.7
V
VCC = 4.5 V to 5.5 V
VCC × 0.7
VCC = 2 V
0.5
VIL Low-level input voltage
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC × 0.3
VCC × 0.3
V
VCC = 4.5 V to 5.5 V
VCC × 0.3
VI Input voltage
0 5.5 V
VO Output voltage
0
VCC
V
VCC = 2 V
−50 µA
IOH High-level output current
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
−2
−6 mA
VCC = 4.5 V to 5.5 V
−12
VCC = 2 V
50 µA
IOL Low-level output current
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
2
6 mA
VCC = 4.5 V to 5.5 V
12
VCC = 2.3 V to 2.7 V
200
t/v Input transition rise or fall rate
VCC = 3 V to 3.6 V
100 ns/V
VCC = 4.5 V to 5.5 V
20
TA Operating free-air temperature
−40 105 °C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Features SN74LV04AĆEP HEX INVERTER D Controlled Baseline − One Assembly/Test Site, O ne Fabrication Site D Extended Temperat ure Performance of −40°C to 105°C D Enhanced Diminishing Manufacturing Sou rces (DMS) Support D Enhanced Product-C hange Notification D Qualification Pedi gree† D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V † Component qualification in accordance with JEDEC and industry standards to ensure reliab le operation over an extended temperatu re range. This includes, but is not lim ited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cy cle, autoclave or unbiased HAST, electr omigration, bond intermetallic life, an d mold compound life. Such qualificatio n testing should not be viewed as justi fying use of this component beyond spec ified performance and environmental lim its. SCLS563A − JANUARY 2004 − REV ISED MAY 2004 D Typical VOLP (Output Gr ound Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C.
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