SN74LV125A Buffer Gates Datasheet

SN74LV125A Datasheet, PDF, Equivalent


Part Number

SN74LV125A

Description

Quadruple Bus Buffer Gates

Manufacture

etcTI

Total Page 28 Pages
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SN74LV125A
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SN74LV125A
SCES124N – DECEMBER 1997 – REVISED JANUARY 2016
SN74LV125A Quadruple Bus Buffer Gates With 3-State Outputs
1 Features
1 2-V to 5.5-V VCC Operation
• Max tpd of 6 ns at 5 V
• Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
> 2.3 V at VCC = 3.3 V, TA = 25°C
• Support Mixed-Mode Voltage Operation on
All Ports
• Ioff Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 4000-V Human-Body Model
– 200-V Machine Model
– 2000-V Charged-Device Model
2 Applications
• Flow Meters
• Solid State Drives (SSDs): Enterprise
• Power Over Ethernet (PoE)
• Programmable Logic Controllers
• Motor Drives and Controls
• Electronic Points of Sale
3 Description
The SN74LV125A quadruple bus buffer gate is
designed for 2-V to 5.5-V VCC operation.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TVSOP (14)
3.60 mm x 4.40 mm
SOIC (14)
8.65 mm × 3.91 mm
SN74LV125A
SOP (14)
10.30mm x 5.30 mm
SSOP (14)
6.20 mm x 5.30 mm
TSSOP (14)
5.00 mm x 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Simplified Schematic
1OE
1A
3OE
1Y 3A
3Y
2OE
2A
4OE
2Y 4A
4Y
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

SN74LV125A
SN74LV125A
SCES124N – DECEMBER 1997 – REVISED JANUARY 2016
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Simplified Schematic............................................. 1
5 Revision History..................................................... 2
6 Pin Configuration and Functions ......................... 3
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings ............................................................ 4
7.3 Recommended Operating Conditions....................... 5
7.4 Thermal Information .................................................. 5
7.5 Electrical Characteristics........................................... 6
7.6 Switching Characteristics, VCC = 2.5 V ± 0.2 V ........ 6
7.7 Switching Characteristics, VCC = 3.3 V ± 0.3 V ....... 6
7.8 Switching Characteristics, VCC = 5 V ± 0.5 V ........... 7
7.9 Noise Characteristics ................................................ 7
7.10 Operating Characteristics........................................ 7
7.11 Typical Characteristics ............................................ 7
8 Parameter Measurement Information .................. 8
9 Detailed Description .............................................. 9
9.1 Overview ................................................................... 9
9.2 Functional Block Diagram ......................................... 9
9.3 Feature Description................................................... 9
9.4 Device Functional Modes.......................................... 9
10 Application and Implementation........................ 10
10.1 Application Information.......................................... 10
10.2 Typical Application ............................................... 10
11 Power Supply Recommendations ..................... 11
12 Layout................................................................... 12
12.1 Layout Guidelines ................................................. 12
12.2 Layout Example .................................................... 12
13 Device and Documentation Support ................. 12
13.1 Related Links ........................................................ 12
13.2 Trademarks ........................................................... 12
13.3 Electrostatic Discharge Caution ............................ 12
13.4 Glossary ................................................................ 12
14 Mechanical, Packaging, and Orderable
Information ........................................................... 12
5 Revision History
Changes from Revision M (December 2014) to Revision N
Page
• Added Tj spec to Absolute Maximum Ratings table ............................................................................................................... 4
• Added text to Overview section ............................................................................................................................................. 9
Changes from Revision L (April 2005) to Revision M
Page
• Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
• Deleted Ordering Information table. ....................................................................................................................................... 1
• Changed MAX operating temperature to 125°C in Recommended Operating Conditions table. ......................................... 5
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Product Folder Links: SN74LV125A


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74LV125A SCES124N – DECE MBER 1997 – REVISED JANUARY 2016 SN74 LV125A Quadruple Bus Buffer Gates With 3-State Outputs 1 Features •1 2-V to 5.5-V VCC Operation • Max tpd of 6 n s at 5 V • Typical VOLP (Output Groun d Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Unde rshoot) > 2.3 V at VCC = 3.3 V, TA = 25 °C • Support Mixed-Mode Voltage Oper ation on All Ports • Ioff Supports Pa rtial-Power-Down Mode Operation • Lat ch-Up Performance Exceeds 250 mA Per JE SD 17 • ESD Protection Exceeds JESD 2 2 – 4000-V Human-Body Model – 200-V Machine Model – 2000-V Charged-Devic e Model 2 Applications • Flow Meters • Solid State Drives (SSDs): Enterpr ise • Power Over Ethernet (PoE) • P rogrammable Logic Controllers • Motor Drives and Controls • Electronic Poi nts of Sale 3 Description The SN74LV12 5A quadruple bus buffer gate is designed for 2-V to 5.5-V VCC operation. Device Information(1) PART N.
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