NCP81119A Multiple-Phase Controller Datasheet

NCP81119A Datasheet, PDF, Equivalent


Part Number

NCP81119A

Description

Multiple-Phase Controller

Manufacture

ON Semiconductor

Total Page 28 Pages
Datasheet
Download NCP81119A Datasheet


NCP81119A
NCP81119, NCP81119A
Multiple-Phase Controller
with SVID Interface for
Desktop and Notebook CPU
Applications
The NCP81119/A Multi−Phase buck solution is optimized for
http://onsemi.com
Intel® VR12.5 compatible CPUs with user configurations of 4/3/2/1
phases. The controller combines true differential voltage sensing,
differential inductor DCR current sensing, input voltage
MARKING
DIAGRAM
feed−forward, and adaptive voltage positioning to provide accurately
regulated power for both Desktop and Notebook applications. The
1
NCP
81119
control system is based on Dual−Edge pulse−width modulation
(PWM) combined with DCR current sensing providing the fastest
QFN32
CASE 510AT
ALYWG
G
initial response to dynamic load events at reduced system cost. It has
the capability to shed to single phase during light load operation and
can auto frequency scale in light load conditions while maintaining
excellent transient performance.
High performance operational error amplifiers are provided to
simplify compensation of the system. Patented Dynamic Reference
Injection further simplifies loop compensation by eliminating the need
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
to compromise between closed−loop transient response and Dynamic
VID performance. Patented Total Current Summing provides highly
accurate digital current monitoring.
Features
ORDERING INFORMATION
See detailed ordering and shipping information on page 27 of
this data sheet.
Meets Intel VR12.5 Specifications
Current Mode Dual Edge Modulation for Fastest Initial Response to
Transient Loading
High Performance Operational Error Amplifier
Digital Soft Start Ramp
Dynamic Reference Injection
Accurate Total Summing Current Amplifier
Dual High Impedance Differential Voltage and Total
Vin Feed Forward Ramp Slope
Current Sense Amplifiers
Phase−to−Phase Dynamic Current Balancing
“Lossless” DCR Current Sensing for Current Balancing
Pin Programming for Internal SVID parameters
Over Voltage Protection (OVP) & Under Voltage
Protection (UVP)
True Differential Current Balancing Sense Amplifiers
Over Current Protection (OCP)
for Each Phase
Adaptive Voltage Positioning (AVP)
Switching Frequency Range of 280 kHz – 600 kHz
Startup into Pre−Charged Loads While Avoiding False
OVP
VR−RDY Output with Internal Delays
These are Pb−Free Devices
Applications
Desktop and Notebook Processors
Power Saving Phase Shedding
© Semiconductor Components Industries, LLC, 2013
December, 2013 − Rev. 2
1
Publication Order Number:
NCP81119/D

NCP81119A
NCP81119, NCP81119A
VSN
DAC
VSP
GND
CSREF
DIFFAMP
+−
Error
Amp
Current
Measurement
& Limit
CS
Amp
TSENSE
VRHOT
SDIO
ALERT
SCLK
VRDY
Thermal
Monitor
VSP
VSN
OVP
OVP
SVID Interface
Data
Registers
ADC
DAC
DAC
VR Ready
Comparator
Enable
VSP
VSN
DAC
IPH4
IPH3
IPH2
IPH1
Current
Balance
RAMP1
RAMP2
RAMP3
RAMP4
PWM
Generators
OVP
COMP
Enable
MUX
VSP−VSN
TSENSE
VBOOT
IOUT
IMAX
ADDR
CSN4
CSP4
CSN2
CSP2
CSN3
CSP3
CSN1
CSP1
Enable
Enable
Ramp
Generators
Power State
Stage
UVLO & EN
GND
VCC
ENABLE
NCP81102
Figure 1. Block Diagram for NCP81119/A
http://onsemi.com
2


Features NCP81119, NCP81119A Multiple-Phase Cont roller with SVID Interface for Deskto p and Notebook CPU Applications The N CP81119/A Multi−Phase buck solution i s optimized for http://onsemi.com Int el® VR12.5 compatible CPUs with user c onfigurations of 4/3/2/1 phases. The co ntroller combines true differential vol tage sensing, differential inductor DCR current sensing, input voltage MARKIN G DIAGRAM feed−forward, and adaptive voltage positioning to provide accurat ely regulated power for both Desktop an d Notebook applications. The 1 NCP 81 119 control system is based on Dual− Edge pulse−width modulation (PWM) com bined with DCR current sensing providin g the fastest QFN32 CASE 510AT ALYWG G initial response to dynamic load eve nts at reduced system cost. It has the capability to shed to single phase dur ing light load operation and can auto f requency scale in light load conditions while maintaining excellent transient performance. High performance operational error amplifiers are provided .
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