Triple 3-Input OR Gate
Data sheet acquired from Harris Semiconductor SCHS210G
August 1997 - Revised June 2006
CD54HC4075, CD74HC4075, CD54HCT4...
Description
Data sheet acquired from Harris Semiconductor SCHS210G
August 1997 - Revised June 2006
CD54HC4075, CD74HC4075, CD54HCT4075, CD74HCT4075
High-Speed CMOS Logic Triple 3-Input OR Gate
[ /Title (CD74H C4075, CD74H CT4075) /Subject (High Speed CMOS Logic Triple 3Input
Features
Description
Buffered Inputs
Typical Propagation Delay: CL = 15pF, TA = 25oC
8ns
at
VCC
=
5V,
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55oC to 125oC
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
The ’HC4075 and ’HCT4075 logic gates utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The HCT logic family is functionally pin compatible with the standard LS logic family.
Ordering Information
PART NUMBER CD54HC4075F3A CD54HC4075FK CD54HCT4075F3A CD74HC4075E CD74HC4075M CD74HC4075MT CD74HC4075M96 CD74HC4075NSR CD74HC4075PW
TEMP. RANGE (oC)
-55 to 125 -55 to 125 -5...
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