CD74HC4002 NOR Gate Datasheet

CD74HC4002 Datasheet, PDF, Equivalent


Part Number

CD74HC4002

Description

Dual 4-Input NOR Gate

Manufacture

etcTI

Total Page 17 Pages
Datasheet
Download CD74HC4002 Datasheet


CD74HC4002
CD54HC4002, CD74HC4002
Data sheet acquired from Harris Semiconductor
SCHS197E
August 1997 - Revised October 2003
High-Speed CMOS Logic
Dual 4-Input NOR Gate
[ /Title
(CD74H
C4002)
/Subject
(High
Speed
CMOS
Logic
Dual 4-
Input
NOR
Gate)
Features
Description
Typical Propagation Delay
CL = 15pF, TA = 25oC
=
8ns
at
VCC
=
5V,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at
VCC = 5V
The ’HC4002 logic gate utilizes silicon gate CMOS
technology to achieve operating speeds similar to LSTTL
gates with the low power consumption of standard CMOS
integrated circuits. All devices have the ability to drive 10
LSTTL loads. The ’HC4002 logic family is functional as well
as pin compatible with the standard LS logic family.
Ordering Information
PART NUMBER
CD54HC4002F3A
CD74HC4002E
CD74HC4002M
CD74HC4002MT
CD74HC4002M96
TEMP. RANGE
(oC)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
14 Ld CERDIP
14 Ld PDIP
14 Ld SOIC
14 Ld SOIC
14 Ld SOIC
CD74HC4002NSR
-55 to 125
14 Ld SOP
CD74HC4002PW
-55 to 125
14 Ld TSSOP
CD74HC4002PWR
-55 to 125
14 Ld TSSOP
CD74HC4002PWT
-55 to 125
14 Ld TSSOP
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
Pinout
CD54HC4002
(CERDIP)
CD74HC4002
(PDIP, SOIC, SOP, TSSOP)
TOP VIEW
1Y 1
1A 2
1B 3
1C 4
1D 5
NC 6
GND 7
14 VCC
13 2Y
12 2D
11 2C
10 2B
9 2A
8 NC
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1

CD74HC4002
Functional Diagram
CD54HC4002, CD74HC4002
2
1A
3
1B
4
1C
5
1D
9
2A
10
2B
11
2C
12
2D
1
1Y
13
2Y
GND = 7
VCC = 14
NC = 6, 8
Logic Symbol
TRUTH TABLE
INPUTS
OUTPUT
nA nB nC nD nY
L L L LH
HXXX L
XHXX L
XXHX L
XXXHL
H = High Voltage Level, L = Low Voltage Level, X = Irrelevant
nA
nB
nY
nC
nD
2


Features CD54HC4002, CD74HC4002 Data sheet acqui red from Harris Semiconductor SCHS197E August 1997 - Revised October 2003 Hig h-Speed CMOS Logic Dual 4-Input NOR Gat e [ /Title (CD74H C4002) /Subject (Hig h Speed CMOS Logic Dual 4Input NOR Gate ) Features Description • Typical Propagation Delay CL = 15pF, TA = 25oC = 8ns at VCC = 5V, • Fanout (O ver Temperature Range) - Standard Outp uts . . . . . . . . . . . . . . . 10 LS TTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagatio n Delay and Transition Times • Signi ficant Power Reduction Compared to LST TL Logic ICs • HC Types - 2V to 6V O peration - High Noise Immunity: NIL = 3 0%, NIH = 30%of VCC at VCC = 5V The HC4002 logic gate utilizes silicon gat e CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The .
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