8-STAGE SYNCHRONOUS DOWN COUNTER
D Controlled Baseline
− One Assembly/Test Site, One Fabrication Site
D Extended Temperature Performance of
−40°C to 125°...
Description
D Controlled Baseline
− One Assembly/Test Site, One Fabrication Site
D Extended Temperature Performance of
−40°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification D Qualification Pedigree† D Synchronous or Asynchronous Preset D Cascadable in Synchronous or Ripple
Mode
D Fanout (Over Temperature Range)
− Standard Outputs . . . 10 LSTTL Loads − Bus Driver Outputs . . . 15 LSTTL Loads
† Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
CD74HC40103ĆEP HIGHĆSPEED CMOS LOGIC 8ĆSTAGE SYNCHRONOUS DOWN COUNTER
SCLS548 − DECEMBER 2003
D Balanced Propagation Delay and Transition
Times
D Significant Power Reduction Compared to
LSTTL Logic ICs
D VCC Voltage = 2 V to 6 V D High Noise Immunity NIL or NIH = 30% of
VCC, VCC = 5 V
M PACKAGE (TOP VIEW)
CP MR TE P0 P1 P2 P3 GND
1 2 3 4 5 6 7 8
16 VCC 15 PE (SYNC) 14 TC 13 P7 12 P6 11 P5 10 P4 9 PL (ASYNC)
description/ordering information
The CD74HC40103 is manufactured with high-speed silicon-gate technology and consists of an 8-stage synchronous down counter...
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