D 2-V to 6-V Operation D Fully Static Operation D Buffered Inputs D Common Reset D Positive-Edge Clocking D Balanced Propagation Delay and Transition
Times
D High Noise Immunity: NIL = 30%, NIH = 30%
of VCC at VCC = 5 V
D Packaged in Ceramic (F) DIP Package and
Also Available in Chip Form (H)
CD54HC4017 DECADE COUNTER/DIVIDER WITH TEN DECODED OUTPUTS
SGDS01...
