DAC121S101QML-SP Digital-to-Analog Converter Datasheet

DAC121S101QML-SP Datasheet, PDF, Equivalent


Part Number

DAC121S101QML-SP

Description

Radiation Hardened 12-Bit Micro Power Digital-to-Analog Converter

Manufacture

etcTI

Total Page 30 Pages
Datasheet
Download DAC121S101QML-SP Datasheet


DAC121S101QML-SP
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DAC121S101QML-SP
SNAS410F – MAY 2008 – REVISED JULY 2016
DAC121S101QML-SP Radiation Hardened 12-Bit Micro Power Digital-to-Analog Converter
With Rail-to-Rail Output
1 Features
1 5962R07726
– Total Ionizing Dose 100 krad(Si)
– Single Event Latch-up Immune
120 MeV-cm2/mg
– Single Event Functional Interrupt Immune
120 MeV-cm2/mg (See Radiation Report)
• Ensured Monotonicity
• Low Power Operation
• Rail-to-Rail Voltage Output
• Power-On Reset to Zero Volts Output
• SYNC Interrupt Facility
• Wide Power Supply Range (2.7 V to 5.5 V)
• Small Packages
• Power-Down Feature
• Key Specifications
– Resolution: 12 Bits
– DNL: +0.21, –0.10 LSB (Typical)
– Output Settling Time: 12.5 µs (Typical)
– Zero Code Error: 2.1 mV (Typical)
– Full-Scale Error: 0.04% FS (Typical)
– Power Dissipation
– Normal Mode: 0.52 mW (3.6 V) and 1.19
mW (5.5 V) Typical
– Power-Down Mode: 0.014 µW (3.6 V) and
0.033 µW (5.5 V) Typical
2 Applications
• Satellites
– Altitude and Orbit Control
– Precision Sensors
– Motor Control
• High Temperatures
3 Description
The DAC121S101QML-SP device is a full-featured,
general-purpose, 12-bit voltage-output digital-to-
analog converter (DAC) that can operate from a
single 2.7-V to 5.5-V supply and consumes just
177 µA of current at 3.6 V. The on-chip output
amplifier allows rail-to-rail output swing and the three-
wire serial interface operates at clock rates up to
20 MHz over the specified supply voltage range and
is compatible with standard SPI, QSPI, MICROWIRE,
and DSP interfaces.
The supply voltage for the DAC121S101QML-SP
serves as its voltage reference, providing the widest
possible output dynamic range. A power-on reset
circuit ensures that the DAC output powers up to zero
volts and remains there until there is a valid write to
the device. A power-down feature reduces power
consumption to less than a microWatt.
The low power consumption and small packages of
the DAC121S101QML-SP make it an excellent
choice for use in battery-operated equipment.
Device Information(1)
PART NUMBER
GRADE
PACKAGE
DAC121S101WGRQV
5962R0722601VZA 100 krad
10-lead ceramic
SOIC
DAC121S101WGRLV
5962R0722602VZA 100 krad
ELDRS-Free
10-lead ceramic
SOIC
DAC121S101-MDR 5962R0722601V9A 100 krad Die
DAC121S101WGMPR
Pre-Flight Engineering
Prototype
10-lead ceramic
SOIC
DAC121S101CVAL Ceramic Evaluation Board
10-lead ceramic
SOIC
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Functional Block Diagram
VA GND
POWER-ON
RESET
DAC121S101
DAC
REGISTER
12
12
INPUT
CONTROL
LOGIC
REF(+) REF(-)
12-BIT DAC
BUFFER
POWER-DOWN
CONTROL
LOGIC
VOUT
5k 100k
SYNC SCLK
DIN
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

DAC121S101QML-SP
DAC121S101QML-SP
SNAS410F – MAY 2008 – REVISED JULY 2016
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 5
6.5 DAC121S101QML-SP Electrical Characteristics DC
Parameters................................................................. 5
6.6 DAC121S101QML-SP Electrical Characteristics AC
and Timing Characteristics ........................................ 7
6.7 DAC121S101QML Electrical Characteristics
Radiation Electrical Characteristics ........................... 7
6.8 DAC121S101QML-SP Electrical Characteristics
Operating Life Test Delta Parameters
TA at 25°C .................................................................. 8
6.9 Typical Characteristics ............................................ 10
7 Detailed Description ............................................ 15
7.1 Overview ................................................................. 15
7.2 Functional Block Diagram ....................................... 15
7.3 Feature Description................................................. 15
7.4 Device Functional Modes........................................ 16
7.5 Programming........................................................... 17
8 Application and Implementation ........................ 18
8.1 Application Information............................................ 18
8.2 Typical Application ................................................. 21
9 Power Supply Recommendations...................... 22
9.1 Using References as Power Supplies..................... 22
10 Layout................................................................... 25
10.1 Layout Guidelines ................................................. 25
10.2 Layout Example .................................................... 25
11 Device and Documentation Support ................. 26
11.1 Device Support .................................................... 26
11.2 Documentation Support ........................................ 27
11.3 Receiving Notification of Documentation Updates 27
11.4 Community Resources.......................................... 27
11.5 Trademarks ........................................................... 27
11.6 Electrostatic Discharge Caution ............................ 27
11.7 Glossary ................................................................ 27
12 Mechanical, Packaging, and Orderable
Information ........................................................... 27
12.1 Engineering Samples ............................................ 27
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (March 2013) to Revision F
Page
• Changed data sheet title DAC121S101QML 12-Bit Micro Power Digital-to-Analog Converter With Rail-to-Rail Output
to DAC121S101QML-SP Radiation Hardened 12-Bit Micro Power Digital-to-Analog Converter With Rail-to-Rail Output.... 1
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
Changes from Revision D (March 2013) to Revision E
Page
• Changed layout of National Data Sheet to TI format ........................................................................................................... 20
2 Submit Documentation Feedback
Copyright © 2008–2016, Texas Instruments Incorporated
Product Folder Links: DAC121S101QML-SP


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community DAC121S101QML-SP SNAS410F MAY 2008 – REVISED JULY 2016 DAC121 S101QML-SP Radiation Hardened 12-Bit Mi cro Power Digital-to-Analog Converter W ith Rail-to-Rail Output 1 Features • 1 5962R07726 – Total Ionizing Dose 10 0 krad(Si) – Single Event Latch-up Im mune 120 MeV-cm2/mg – Single Event Fu nctional Interrupt Immune 120 MeV-cm2/m g (See Radiation Report) • Ensured Mo notonicity • Low Power Operation • Rail-to-Rail Voltage Output • Power-O n Reset to Zero Volts Output • SYNC I nterrupt Facility • Wide Power Supply Range (2.7 V to 5.5 V) • Small Packa ges • Power-Down Feature • Key Spec ifications – Resolution: 12 Bits – DNL: +0.21, –0.10 LSB (Typical) – O utput Settling Time: 12.5 µs (Typical) – Zero Code Error: 2.1 mV (Typical) – Full-Scale Error: −0.04% FS (Typi cal) – Power Dissipation – Normal M ode: 0.52 mW (3.6 V) and 1.19 mW (5.5 V) Typical – Power-Down Mode: 0.014 µW (3.6 V) and 0.033 µW (5.5 V) Typica.
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