DAC1280 Digital-to-Analog Converter Datasheet

DAC1280 Datasheet, PDF, Equivalent


Part Number

DAC1280

Description

Low Distortion Digital-to-Analog Converter

Manufacture

etcTI

Total Page 26 Pages
Datasheet
Download DAC1280 Datasheet


DAC1280
DAC1280
DAC1280
www.ti.com
SBAS432A – APRIL 2010 – REVISED SEPTEMBER 2010
Low Distortion Digital-to-Analog Converter for Seismic Monitoring
Check for Samples: DAC1280
FEATURES
1
2 Outstanding Performance:
– THD: –125dB
– SNR: 120dB (413Hz BW, Gain = 1/1)
– Gain Error: 0.1%
• Pin Operation: No Registers to Program
• Gain: 1/1 to 1/64
• SYNC Input for Phase Control
• Power-Down Mode
• Low Power: 18mW
• Analog Supply: +5V or ±2.5V
• Digital Supply: 1.8V to 3.3V
• Small 16-Pin TSSOP Package
• Temperature Range: –40°C to +85°C
APPLICATIONS
• Energy Exploration Equipment
• Seismic Monitoring Systems
DESCRIPTION
The DAC1280 is a very low distortion digital-to-analog
converter (DAC) suited for performance testing of
seismic equipment. The DAC1280 provides a
high-accuracy output signal from a bitstream input.
The device achieves very high linearity in a small
package while dissipating only 18mW. Together with
the high-performance ADS1281 and ADS1282
analog-to-digital converters (ADCs), these devices
create a test and measurement system that meets
the exacting demands of energy exploration and
seismic monitoring equipment.
The DAC1280 is designed to match the system
components (power supply, clock and reference
voltage) of the companion ADCs, the ADS1281 and
ADS1282. The input to the DAC1280 is a 1s density
modulated bitstream. The DAC1280 output is a
differential current intended for use with an active I/V
converter. The I/V converter provides a voltage output
suitable for performance testing of sensors and
ADCs.
Three gain control pins set the output range in 6dB
steps from 0dB to –36db (±2.5V to ±0.039V
differential). The attenuation ranges match the gains
of the ADS1282 for testing at all gains. The DAC
uses a reference voltage and bias resistor to set the
full-scale output. The resistor can be adjusted to
fine-trim the DAC full-scale.
The SYNC pin aligns the input data sampling to the
CLK phase. A power-down pin shuts down the device
when not in use. The DAC1280 is available in a
small, 16-pin TSSOP package and is fully specified
for operation over –40°C to +85°C temperature range
with a maximum operating temperature of +125°C.
Bitstream
Source
PWDN
SYNC
CLK
DVDD
Synchronization
DAC1280
DGND
VREF AVDD
Current Output
Differential DAC
3
GAIN[2:0]
AVSS
External I/V Converter
VOUT
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated

DAC1280
DAC1280
SBAS432A – APRIL 2010 – REVISED SEPTEMBER 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
For the most current package and ordering information see the Package Option Addendum at the end of this
document, or see the device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range, unless otherwise noted.
DAC1280
MIN MAX
AVDD to AVSS
–0.3 +5.5
AVSS to DGND
–2.8 +0.3
DVDD to DGND
–0.3 +3.6
Input current, momentary
–100
+100
Input current, continuous
–10 +10
Analog input or output voltage to DGND
AVSS – 0.3
AVDD + 0.3
Digital input voltage to DGND
–0.3 DVDD + 0.3
Maximum junction temperature
+150
Operating temperature range
–40 +125
Storage temperature range
–60 +150
UNIT
V
V
V
mA
mA
V
V
°C
°C
°C
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
THERMAL INFORMATION
THERMAL METRIC(1)
DAC1280
TSSOP
UNITS
qJA
qJCtop
qJB
yJT
yJB
qJCbot
Junction-to-ambient thermal resistance(2)
Junction-to-case (top) thermal resistance(3)
Junction-to-board thermal resistance(4)
Junction-to-top characterization parameter(5)
Junction-to-board characterization parameter(6)
Junction-to-case (bottom) thermal resistance(7)
16 PINS
111.9
33.3
52.4
2.0
51.2
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, yJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining qJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, yJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining qJA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
2 Submit Documentation Feedback
Product Folder Link(s): DAC1280
Copyright © 2010, Texas Instruments Incorporated


Features DAC1280 DAC1280 www.ti.com SBAS432A APRIL 2010 – REVISED SEPTEMBER 201 0 Low Distortion Digital-to-Analog Conv erter for Seismic Monitoring Check for Samples: DAC1280 FEATURES 1 •2 Outst anding Performance: – THD: –125dB SNR: 120dB (413Hz BW, Gain = 1/1) Gain Error: 0.1% • Pin Operation: N o Registers to Program • Gain: 1/1 to 1/64 • SYNC Input for Phase Control • Power-Down Mode • Low Power: 18mW • Analog Supply: +5V or ±2.5V • D igital Supply: 1.8V to 3.3V • Small 1 6-Pin TSSOP Package • Temperature Ran ge: –40°C to +85°C APPLICATIONS • Energy Exploration Equipment • Seism ic Monitoring Systems DESCRIPTION The DAC1280 is a very low distortion digita l-to-analog converter (DAC) suited for performance testing of seismic equipmen t. The DAC1280 provides a high-accuracy output signal from a bitstream input. The device achieves very high linearity in a small package while dissipating o nly 18mW. Together with the high-performance ADS1281 and ADS1282 analog-to-digital converters (ADCs), th.
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