Document
STM32L552xx
Ultra-low-power Arm® Cortex®-M33 32-bit MCU+TrustZone®+FPU, 165 DMIPS, up to 512 KB Flash memory, 256 KB SRAM, SMPS
Datasheet - production data
Features
Ultra-low-power with FlexPowerControl
• 1.71 V to 3.6 V power supply • -40 °C to 85/125 °C temperature range • Batch acquisition mode (BAM) • 187 nA in VBAT mode: supply for RTC and
32x32-bit backup registers • 17 nA Shutdown mode (5 wakeup pins) • 108 nA Standby mode (5 wakeup pins) • 222 nA Standby mode with RTC • 3.16 μA Stop 2 with RTC • 106 μA/MHz Run mode (LDO mode) • 62 μA/MHz Run mode @ 3 V
(SMPS step-down converter mode) • 5 µs wakeup from Stop mode • Brownout reset (BOR) in all modes except
Shutdown
Core
• Arm® 32-bit Cortex®-M33 CPU with TrustZone® and FPU
ART Accelerator
• 8-Kbyte instruction cache allowing 0-wait-state execution from Flash memory and external memories; frequency up to 110 MHz, MPU, 165 DMIPS and DSP instructions
Performance benckmark
• 1.5 DMIPS/MHz (Drystone 2.1) • 442 CoreMark® (4.02 CoreMark®/MHz)
Energy benchmark
• 370 ULPMark-CP® score • 54 ULPMark-PP® score • 27400 SecureMark-TLS® score
LQFP48 (7 x 7 mm)
LQFP64 (10 x 10 mm)
LQFP100(*) (14 x14 mm) LQFP144 (20 x 20mm)
FBGA
UFQFPN48 (7 x 7 mm)
UFBGA132 (7 x 7 mm)
WLCSP81 (4.36 x 4.07 mm)
(*): Silhouette shown above.
Memories
• Up to 512-Kbyte Flash, two banks read-whilewrite
• 256 Kbytes of SRAM including 64 Kbytes with hardware parity check
• External memory interface supporting SRAM, PSRAM, NOR, NAND and FRAM memories
• OCTOSPI memory interface
Security
• Arm® TrustZone® and securable I/Os, memories and peripherals
• Flexible life cycle scheme with RDP (readout protection)
• Root of trust thanks to unique boot entry and hide protection area (HDP)
• SFI (secure firmware installation) thanks to embedded RSS (root secure services)
• Secure firmware upgrade support with TF-M
• HASH hardware accelerator
• Active tamper and protection against temperature, voltage and frequency attacks
• True random number generator NIST SP80090B compliant
• 96-bit unique ID
October 2020
This is information on a product in full production.
DS12737 Rev 6
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STM32L552xx
• 512-byte OTP (one-time programmable) for user data
General-purpose input/outputs
• Up to 114 fast I/Os with interrupt capability most 5 V-tolerant and up to 14 I/Os with independent supply down to 1.08 V
Power management
• Embedded regulator (LDO) with three configurable range output to supply the digital circuitry
• Embedded SMPS step-down converter • External SMPS support
Clock management
• 4 to 48 MHz crystal oscillator • 32 kHz crystal oscillator for RTC (LSE) • Internal 16 MHz factory-trimmed RC (±1%) • Internal low-power 32 kHz RC (±5%) • Internal multispeed 100 kHz to 48 MHz
oscillator, auto-trimmed by LSE (better than ±0.25% accuracy) • Internal 48 MHz with clock recovery • 3 PLLs for system clock, USB, audio, ADC
Up to 16 timers and 2 watchdogs
• 16x timers: 2 x 16-bit advanced motor-control, 2 x 32-bit and 5 x 16-bit general purpose, 2x 16-bit basic, 3x low-power 16-bit timers (available in Stop mode), 2x watchdogs, 2x SysTick timer
• RTC with hardware calendar, alarms and calibration
Up to 19 communication peripherals
• 1x USB Type-C™/ USB power delivery controller
• 1x USB 2.0 full-speed crystal less solution, LPM and BCD
• 2x SAIs (serial audio interface) • 4x I2C FM+(1 Mbit/s), SMBus/PMBus™ • 6x USARTs (ISO 7816, LIN, IrDA, modem) • 3x SPIs (7x SPIs with USART and OCTOSPI in
SPI mode) • 1x FDCAN controller • 1x SDMMC interface
2 DMA controllers
• 14 DMA channels
Up to 22 capacitive sensing channels
• Support touch key, linear and rotary touch sensors
Rich analog peripherals (independent supply)
• 2x 12-bit ADC 5 Msps, up to 16-bit with hardware oversampling, 200 µA/Msps
• 2x 12-bit DAC outputs, low-power sample and hold
• 2x operational amplifiers with built-in PGA • 2x ultra-low-power comparators • 4x digital filters for sigma delta modulator
CRC calculation unit
Debug
• Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™ (ETM)
Reference STM32L552xx
Table 1. Device summary
Part numbers
STM32L552CC, STM32L552CE, STM32L552ME, STM32L552QC, STM32L552QE, STM32L552RC, STM32L552RE, STM32L552VC, STM32L552VE, STM32L552ZC, STM32L552ZE
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STM32L552xx
Contents
Contents
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1 Arm® Cortex®-M33 core with TrustZone® and FPU . . . . . . . . . . . . . . . . . 20
3.2 Art Accelerator – instruction cache (ICACHE) . . . . . . . . . . . . . . . . . . . . . 20
3.3 Me.