ADA4254 Instrumentation Amplifier Datasheet

ADA4254 Datasheet, PDF, Equivalent


Part Number

ADA4254

Description

Programmable Gain Instrumentation Amplifier

Manufacture

Analog Devices

Total Page 30 Pages
Datasheet
Download ADA4254 Datasheet


ADA4254
Data Sheet
Zero Drift, High Voltage, Low Power,
Programmable Gain Instrumentation Amplifier
ADA4254
FEATURES
Optimized for ADC synchronization
Low power: 22 mW (±12 V supplies)
12 binary gain steps from 1/16 V/V to 128 V/V
3 scaling gains: 1 V/V, 1.25 V/V, and 1.375 V/V
±60 V protected input multiplexer
Excellent dc precision
Low input offset voltage: ±14 µV maximum
Low input offset voltage drift: ±0.08 µV/°C maximum
Gain calibration via ROM
Low gain drift: ±1 ppm/°C maximum
High CMRR: 116 dB minimum, G = 1 V/V
Low input bias current: ±1.5 nA maximum
High input impedance
Integrated input EMI filtering
Wide input supply range: ±5 V to ±28 V
Dedicated output amplifier supplies
7 GPIO ports with special functions
Sequential chip select mode
External multiplexer control
Excitation current sources
SPI port with checksum (CRC) support
Internal fault detection
Wire break test currents
On-chip test multiplexer
28-lead, 5 mm × 5 mm LFCSP, 24-lead TSSOP
Specified temperature range: −40°C to +105°C
APPLICATIONS
Universal process control front ends
Data acquisition systems
Test and measurement systems
GENERAL DESCRIPTION
The ADA4254 is a zero drift, high voltage, low power
programmable gain instrumentation amplifier (PGIA) designed
for process control and industrial applications. The ADA4254
features 12 binary weighted gains ranging from 1/16 V/V to
128 V/V and three scaling gain options of 1 V/V, 1.25 V/V, and
1.375 V/V, resulting in 36 possible gain settings. The power
consumption of the ADA4254 is a mere 22 mW, making the
device an excellent choice for industrial systems that demand
precision, robustness, and low power.
The zero drift amplifier topology of the ADA4254 self calibrates
dc errors and low frequency 1/f noise, achieving excellent dc
precision over the entire specified temperature range. This high
level of precision maximizes dynamic range and greatly reduces
calibration requirements in many applications.
Rev. A
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SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
VDDH
IOUT_HV
IOUT_LV
EXCITATION
CURRENTS
ADA4254
AVDD
+IN1
–IN1
+IN2
–IN2
+ ROUT
+
RIN
+
+
ROUT
DIGITAL CONTROL
7 × GPIO SPI INTERFACE
–OUT
VOCM
+OUT
AVSS
DVDD
DVSS
VSSH
Figure 1.
The input multiplexer provides ±60 V protection to the high
impedance inputs of the amplifier, while providing the
capability to switch between two input sources. In addition,
integrated electromagnetic interference (EMI) filters block
harsh RF noise from the sensitive inputs of the amplifier.
Various safety features on the ADA4254 detect both internal
and external faults. The serial port interface (SPI) supports
cyclical redundancy check (CRC) error detection to ensure
robust communication. These safety features ease system safety
integrity level (SIL) certification.
Seven general-purpose input/output (GPIO) pins, which can be
configured to provide various special functions, are included in
the ADA4254. An excitation current source output is available
to bias sensors such as resistance temperature detectors (RTDs).
The ADA4254 is specified over the −40°C to +105°C temperature
range and is offered in a compact 5 mm × 5 mm, 28-lead LFCSP
and a 24-lead TSSOP.
COMPANION PRODUCTS
ADCs: AD4007, AD7768, AD7175-2
ADC Drivers: ADA4945-1, LTC6363
Voltage References: ADR4550, ADR3450, LT6656
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2019 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

ADA4254
ADA4254
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Simplified Functional Block Diagram ........................................... 1
Companion Products ....................................................................... 1
Revision History ............................................................................... 3
Specifications..................................................................................... 4
Timing Specifications .................................................................. 8
Absolute Maximum Ratings............................................................ 9
Thermal Resistance ...................................................................... 9
ESD Caution.................................................................................. 9
Pin Configurations and Function Descriptions ......................... 10
Typical Performance Characteristics ........................................... 11
Theory of Operation ...................................................................... 23
Programmable Gain Instrumentation Amplifier ................... 23
Input Multiplexer........................................................................ 24
EMI Reduction and Internal EMI Filter.................................. 24
Input Amplifier ........................................................................... 25
Output Amplifier ........................................................................ 25
Power Supplies ............................................................................ 26
ESD Map...................................................................................... 26
Output Ripple Calibration Configuration .............................. 27
General-Purpose Inputs/Outputs (GPIOs)............................. 27
Excitation Currents .................................................................... 28
External Clock Synchronization............................................... 28
Sequential Chip Select (SCS) .................................................... 28
Gain Error Calibration............................................................... 30
Wire Break Detection ................................................................ 31
Test Multiplexer .......................................................................... 32
External Mux Control................................................................ 32
Digital Interface .............................................................................. 33
SPI Interface ................................................................................ 33
Accessing the ADA4254 Register Map .................................... 33
Checksum Protection................................................................. 33
CRC Calculation......................................................................... 35
Memory Map Checksum Protection ....................................... 35
Read-Only Memory (ROM) Checksum Protection .............. 35
Data Sheet
SPI Read/Write Error Detection .............................................. 35
SPI Command Length Error Detection .................................. 35
Applications Information .............................................................. 36
Input and Output Offset Voltage and Noise ........................... 36
ADC Clock Synchronization .................................................... 36
Programmable Logic Controller (PLC) Voltage/Current Input
....................................................................................................... 37
3-Wire RTD With Current Excitation..................................... 38
High Rail Current Sensing ........................................................ 39
Register Summary .......................................................................... 40
Register Details ............................................................................... 42
GAIN_MUX Register Details................................................... 42
Software Reset Register (Reset) Details................................... 43
Clock Synchronization Configuration Register (SYNC_CFG)
Details .......................................................................................... 44
Digital Error Register (DIGITAL_ERR) Details .................... 45
Analog Error Register (ANALOG_ERR) Details .................. 46
GPIO Data Register (GPIO_DATA) Details .......................... 47
Internal Mux Control Register (INPUT_MUX) Details....... 48
Wire Break Detect Register (WB_DETECT) Details............ 49
GPIO Direction Register (GPIO_DIR) Details...................... 50
Sequential Chip Select Register (SCS) Details ....................... 50
Analog Error Mask Register (ANALOG_ERR_DIS) Details.... 51
Digital Error Mask Register (DIGITAL_ERR_DIS) Details ..... 52
Special Function Configuration Register (SF_CFG) Details..... 53
Error Configuration Register.................................................... 54
Test Multiplexer Register (TEST_MUX) Details ................... 55
Excitation Current Configuration Register
(EX_CURRENT_CFG) Details ................................................ 56
Gain Calibration Registers (GAIN_CALx) Details ............... 57
Trigger Calibration Register (TRIG_CAL) Details................ 58
Master Clock Count Register (M_CLK_CNT) Details......... 58
DIE Revision Identification Register (DIE_REV_ID) Details
....................................................................................................... 58
Device Identification Registers (PART_ID) Details .............. 58
Outline Dimensions ....................................................................... 59
Ordering Guide .......................................................................... 59
Rev. A | Page 2 of 59


Features Data Sheet Zero Drift, High Voltage, Lo w Power, Programmable Gain Instrumentat ion Amplifier ADA4254 FEATURES Optimiz ed for ADC synchronization Low power: 2 2 mW (±12 V supplies) 12 binary gain s teps from 1/16 V/V to 128 V/V 3 scaling gains: 1 V/V, 1.25 V/V, and 1.375 V/V ±60 V protected input multiplexer Exce llent dc precision Low input offset vol tage: ±14 µV maximum Low input offset voltage drift: ±0.08 µV/°C maximum Gain calibration via ROM Low gain drift : ±1 ppm/°C maximum High CMRR: 116 dB minimum, G = 1 V/V Low input bias curr ent: ±1.5 nA maximum High input impeda nce Integrated input EMI filtering Wide input supply range: ±5 V to ±28 V De dicated output amplifier supplies 7 GPI O ports with special functions Sequenti al chip select mode External multiplexe r control Excitation current sources SP I port with checksum (CRC) support Inte rnal fault detection Wire break test cu rrents On-chip test multiplexer 28-lead , 5 mm × 5 mm LFCSP, 24-lead TSSOP Specified temperature range: −40°C to +1.
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