FDPC5030SG N-Channel MOSFET Datasheet

FDPC5030SG Datasheet, PDF, Equivalent


Part Number

FDPC5030SG

Description

Dual N-Channel MOSFET

Manufacture

ON Semiconductor

Total Page 13 Pages
Datasheet
Download FDPC5030SG Datasheet


FDPC5030SG
MOSFET - Dual N‐Channel,
Asymmetric,
POWERTRENCH) Power
Clip 30 V
FDPC5030SG
General Description
This device includes two specialized N-Channel MOSFETs in
a dual package. The switch node has been internally connected to
enable easy placement and routing of synchronous buck converters.
The control MOSFET (Q1) and synchronous SyncFETt (Q2) have
been designed to provide optimal power efficiency.
Features
Q1: N-Channel
Max RDS(on) = 5.0 mW at VGS = 10 V, ID = 17 A
Max RDS(on) = 6.5 mW at VGS = 4.5 V, ID = 14 A
Q2: N-Channel
Max RDS(on) = 2.4 mW at VGS = 10 V, ID = 25 A
Max RDS(on) = 3.0 mW at VGS = 4.5 V, ID = 22 A
Low Inductance Packaging Shortens Rise/Fall Times, Resulting in
Lower Switching Losses.
MOSFET Integration Enables Optimum Layout for Lower Circuit
Inductance and Reduced Switch Node Ringing.
RoHS Compliant
Applications
Computing
Communications
General Purpose Point of Load
Table 1. PIN DESCRIPTION
Pin Name
1 HSG
2 GR
3, 4, 10
V+(HSD)
5, 6, 7
SW
8 LSG
9 GND (LSS)
Description
High Side Gate
Gate Return
High Side Drain
Switching Node, Low Side Drain
Low Side Gate
Low Side Source
© Semiconductor Components Industries, LLC, 2016
November, 2019 Rev. 4
1
www.onsemi.com
ELECTRICAL CONNECTION
N-Channel MOSFET
PIN1
Top View
Bottom View
Power Clip 56
(PQFN8 5x6)
CASE 483AR
PIN ASSIGNMENT
HSG
GR
V+
V+
LSG
SW
SW
SW
*PAD10 V+(HSD)
MARKING DIAGRAM
$Y&Z&3&K
FDPC
5030SG
$Y
&Z
&3
&K
FDPC5030SG
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
Publication Order Number:
FDPC5030SG/D

FDPC5030SG
FDPC5030SG
MOSFET MAXIMUM RATINGS (TA = 25°C, Unless otherwise specified)
Symbol
Parameter
Q1
Q2 Unit
VDS
Bvdsst
Drain to Source Voltage
Bvdsst (Transient) < 100 ns
30 30
36 36
V
V
VGS Gate to Source Voltage
ID Drain Current
Continuous (TC = 25°C) (Note 5)
+/20
56
+/12
84
V
A
Continuous (TC = 100°C) (Note 5)
Continuous (TA = 25°C)
Pulsed (TA = 25°C) (Note 4)
EAS Single Pulsed Avalanche Energy (Note 3)
PD Power Dissipation for Single Operation
(TC = 25°C)
(TA = 25°C)
(TA = 25°C)
35
17 (Note 1a)
227
54
23
2.1 (Note 1a)
1.0 (Note 1c)
53
25 (Note 1b)
503
96
25
2.3 (Note 1b)
1.1 (Note 1d)
mJ
W
TJ, TSTG
Operating and Storage Junction Temperature Range
55 to +150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Parameter
RqJC
RqJA
RqJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Q1
5.6
60 (Note 1a)
130 (Note 1c)
Q2
4.9
55 (Note 1b)
120 (Note 1d)
Unit
_C/W
_C/W
_C/W
PACKAGE MARKING AND ORDERING INFORMATION
Device
Top Marking
Package
FDPC5030SG
FDPC5030SG
Power Clip 56
Reel Size
13
Tape Width
12 mm
Quantity
3,000 Units
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Parameter
Test Conditions
Type Min Typ Max Unit
OFF CHARACTERISTICS
BVDSS
Drain to Source Breakdown Voltage
DBVDSS/DTJ Breakdown Voltage Temperature
Coefficient
IDSS
Zero Gate Voltage Drain Current
ID = 250 mA, VGS = 0 V
ID = 1 mA, VGS = 0 V
ID = 250 mA, referenced to 25_C
ID = 10 mA, referenced to 25_C
VVDDSS
=
=
24
24
V,
V,
VVGGSS
=
=
0
0
V
V
Q1
Q2
Q1
Q2
Q1
Q2
30
30
−−V
−−
15 mV/_C
16
1 mA
500
IGSS
Gate to Source Leakage Current,
Forward
VGS = ±20 V, VDS= 0 V
VGS = ±12 V, VDS= 0 V
Q1
Q2
±100
nA
±100
nA
ON CHARACTERISTICS
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 mA
VGS = VDS, ID = 1 mA
Q1 1.0 1.7 3.0
Q2 1.0 1.6 3.0
V
DVGS(th)/DTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 1 mA, referenced to 25_C
ID = 10 mA, referenced to 25_C
Q1
Q2
5
3
mV/_C
www.onsemi.com
2


Features MOSFET - Dual N‐Channel, Asymmetric, P OWERTRENCH) Power Clip 30 V FDPC5030SG General Description This device includ es two specialized N-Channel MOSFETs in a dual package. The switch node has be en internally connected to enable easy placement and routing of synchronous bu ck converters. The control MOSFET (Q1) and synchronous SyncFETt (Q2) have been designed to provide optimal power effi ciency. Features Q1: N-Channel • Max RDS(on) = 5.0 mW at VGS = 10 V, ID = 17 A • Max RDS(on) = 6.5 mW at VGS = 4. 5 V, ID = 14 A Q2: N-Channel • Max RD S(on) = 2.4 mW at VGS = 10 V, ID = 25 A • Max RDS(on) = 3.0 mW at VGS = 4.5 V, ID = 22 A • Low Inductance Packagi ng Shortens Rise/Fall Times, Resulting in Lower Switching Losses. • MOSFET I ntegration Enables Optimum Layout for L ower Circuit Inductance and Reduced Swi tch Node Ringing. • RoHS Compliant Ap plications • Computing • Communicat ions • General Purpose Point of Load Table 1. PIN DESCRIPTION Pin Name 1 HSG 2 GR 3, 4, 10 V+(HSD) 5, 6, 7 SW 8 L.
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