NDS355AN Effect Transistor Datasheet

NDS355AN Datasheet, PDF, Equivalent


Part Number

NDS355AN

Description

N-Channel Logic Level Enhancement Mode Field Effect Transistor

Manufacture

ON Semiconductor

Total Page 7 Pages
Datasheet
Download NDS355AN Datasheet


NDS355AN
NDS355AN
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Features
SuperSOTTM-3 N-Channel logic level enhancement
mode power field effect transistors are produced using ON
Semiconductor's proprietary, high cell density, DMOS
technology. This very high density process is especially
tailored to minimize on-state resistance. These devices are
particularly suited for low voltage applications in notebook
computers, portable phones, PCMCIA cards, and other
battery powered circuits where fast switching, and low in-
line power loss are needed in a very small outline surface
mount package.
1.7A, 30 V, RDS(ON) = 0.125 @ VGS = 4.5 V
RDS(ON) = 0.085 @ VGS = 10 V.
Industry standard outline SOT-23 surface mount package
using proprietary SuperSOTTM-3 design for superior
thermal and electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC current
capability.
Compact industry standard SOT-23 surface mount
package.
_______________________________________________________________________________
D
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VDSS
Drain-Source Voltage
VGSS
Gate-Source Voltage - Continuous
ID Maximum Drain Current - Continuous
- Pulsed
PD Maximum Power Dissipation
(Note 1a)
(Note 1a)
(Note 1b)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a)
RθJC Thermal Resistance, Junction-to-Case (Note 1)
© 1997 Semiconductor Components Industries, LLC.
October-2017, Rev. 3
GS
NDS355AN
30
±20
1.7
10
0.5
0.46
-55 to 150
250
75
Units
V
V
A
W
°C
°C/W
°C/W
Publication Order Number:
NDS355AN/D

NDS355AN
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol Parameter
Conditions
OFF CHARACTERISTICS
BVDSS
IDSS
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
VGS = 0 V, ID = 250 µA
VDS = 24 V, VGS = 0 V
IGSSF
Gate - Body Leakage, Forward
IGSSR
Gate - Body Leakage, Reverse
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage
VGS = 20 VDS = 0 V
VGS = -20 V, VDS = 0 V
VDS = VGS, ID = 250 µA
RDS(ON)
Static Drain-Source On-Resistance
VGS = 4.5 V, ID = 1.7 A
ID(ON)
On-State Drain Current
gFS Forward Transconductance
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 2)
td(on) Turn - On Delay Time
tr Turn - On Rise Time
td(off) Turn - Off Delay Time
tf Turn - Off Fall Time
td(on) Turn - On Delay Time
tr Turn - On Rise Time
td(off) Turn - Off Delay Time
tf Turn - Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VGS = 10 V, ID = 1.9 A
VGS = 4.5 V, VDS = 5 V
VDS = 5 V, ID= 1.7 A
VDS = 15 V, VGS = 0 V,
f = 1.0 MHz
VDD = 10 V, ID = 1 A,
VGS = 10 V, RGEN = 6
VDD = 5 V, ID = 1 A,
VGS = 4.5 V, RGEN = 6
VDS = 10 V, ID = 1.7 A,
VGS = 5 V
Min Typ Max Units
30
TJ =125°C
1
10
100
-100
V
µA
µA
nA
nA
1 1.6 2
TJ =125°C 0.5 1.2 1.5
0.105 0.125
TJ =125°C
0.16 0.23
0.065 0.085
6
3.5
V
A
S
195 pF
135 pF
48 pF
10 20 ns
13 25 ns
13 25 ns
4 10 ns
10 20 ns
32 60 ns
10 20 ns
5 10 ns
3.5 5 nC
0.8 nC
1.7 nC
www.onsemi.com
2


Features NDS355AN N-Channel Logic Level Enhanceme nt Mode Field Effect Transistor Genera l Description Features SuperSOTTM-3 N -Channel logic level enhancement mode p ower field effect transistors are produ ced using ON Semiconductor's proprietar y, high cell density, DMOS technology. This very high density process is espec ially tailored to minimize on-state res istance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, P CMCIA cards, and other battery powered circuits where fast switching, and low inline power loss are needed in a very small outline surface mount package. 1 .7A, 30 V, RDS(ON) = 0.125 Ω @ VGS = 4.5 V RDS(ON) = 0.085 Ω @ VGS = 10 V. Industry standard outline SOT-23 surfa ce mount package using proprietary Supe rSOTTM-3 design for superior thermal an d electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. Compact industry standard SOT-23 surface mo.
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