BUS SWITCH. TS5N118 Datasheet


TS5N118 SWITCH. Datasheet pdf. Equivalent


Part Number

TS5N118

Description

1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH

Manufacture

etcTI

Total Page 18 Pages
Datasheet
Download TS5N118 Datasheet


TS5N118
www.ti.com
FEATURES
Low and Flat ON-State Resistance (ron)
Characteristics Over Operating Range
(ron = 3 Typ)
0- to 10-V Switching on Data I/O Ports
Bidirectional Data Flow With Near-Zero
Propagation Delay
Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(Cio(OFF) = 20 pF Max, B Port)
VCC Operating Range From 4.75 V to 5.25 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog
Applications
TS5N118
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
HIGH-BANDWIDTH BUS SWITCH
SCDS205 – AUGUST 2005
APPLICATIONS
PCI Interface
Differential Signal Interface
Memory Interleaving
Bus Isolation
Low-Distortion Signal Gating
DBQ OR PW PACKAGE
(TOP VIEW)
B4
B3
B2
B1
A
NC
OE
GND
1
2
3
4
5
6
7
8
16 VCC
15 B5
14 B6
13 B7
12 B8
11 S0
10 S1
9 S2
NC − No internal connection
DESCRIPTION/ORDERING INFORMATION
The TS5N118 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass
transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for
minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also
features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.
Specifically designed to support high-bandwidth applications, the TS5N118 provides an optimized interface
solution ideally suited for broadband communications, networking, and data-intensive computing systems.
The TS5N118 is a 1-of-8 multiplexer/demultiplexer with a single output-enable (OE) input. The select (S0, S1,
S2) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is
enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is
high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging
current backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
TA
–40°C to 85°C
ORDERING INFORMATION
PACKAGE (1)
ORDERABLE PART NUMBER
SSOP (QSOP) – DBQ Tape and reel
TS5N118DBQR
TSSOP – PW
Tape and reel
TS5N118PWR
TOP-SIDE MARKING
YB118
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated

TS5N118
TS5N118
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
HIGH-BANDWIDTH BUS SWITCH
SCDS205 – AUGUST 2005
www.ti.com
FUNCTION TABLE
INPUTS
OE S2
S1
LL
L
LL
L
LL
H
LL
H
LH
L
LH
L
LH
H
LH
H
HX
X
S0
INPUT/OUTPUT
A
FUNCTION
L B1 A port = B1 port
H B2 A port = B2 port
L B3 A port = B3 port
H B4 A port = B4 port
L B5 A port = B5 port
H B6 A port = B6 port
L B7 A port = B7 port
H B8 A port = B8 port
X Z Disconnect
5
A
LOGIC DIAGRAM (POSITIVE LOGIC)
SW
SW
SW
SW
SW
SW
SW
SW
4
B1
3
B2
2
B3
1
B4
15
B5
14
B6
13
B7
12
B8
11
S0
10
S1
9
S2
7
OE
2


Features www.ti.com FEATURES • Low and Flat ON- State Resistance (ron) Characteristics Over Operating Range (ron = 3 Ω Typ) • 0- to 10-V Switching on Data I/O Po rts • Bidirectional Data Flow With Ne ar-Zero Propagation Delay • Low Input /Output Capacitance Minimizes Loading a nd Signal Distortion (Cio(OFF) = 20 pF Max, B Port) • VCC Operating Range Fr om 4.75 V to 5.25 V • Latch-Up Perfor mance Exceeds 100 mA Per JESD 78, Class II • ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B , Class II) – 1000-V Charged-Device M odel (C101) • Supports Both Digital a nd Analog Applications TS5N118 1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BAND WIDTH BUS SWITCH SCDS205 – AUGUST 200 5 APPLICATIONS • PCI Interface • Di fferential Signal Interface • Memory Interleaving • Bus Isolation • Low- Distortion Signal Gating DBQ OR PW PAC KAGE (TOP VIEW) B4 B3 B2 B1 A NC OE GN D 1 2 3 4 5 6 7 8 16 VCC 15 B5 14 B6 13 B7 12 B8 11 S0 10 S1 9 S2 NC − No internal connection DESCRIPTION/ORDERING INFORMATION The T.
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