16-bit MCU. ST10F276Z5 Datasheet


ST10F276Z5 MCU. Datasheet pdf. Equivalent


Part Number

ST10F276Z5

Description

16-bit MCU

Manufacture

STMicroelectronics

Total Page 30 Pages
Datasheet
Download ST10F276Z5 Datasheet


ST10F276Z5
ST10F276Z5
16-bit MCU with MAC unit,
832 Kbyte Flash memory and 68 Kbyte RAM
Datasheet - production data
Features
Highly performance 16-bit CPU with DSP
functions
– 31.25 ns instruction cycle time at 64 MHz
max. CPU clock
'?$
LQFP144 20 x 20 x 1.4mm
– Multiply/accumulate unit (MAC) 16 x 16-bit
multiplication, 40-bit accumulator
– Enhanced boolean bit manipulations
– Single-cycle context switching support
On-chip memories
– 512 Kbyte Flash memory (32-bit fetch)
– 320 Kbyte extension Flash memory (16-bit
fetch)
– Single voltage Flash memories with
erase/program controller and 100 K
erasing/programming cycles.
– Up to 16 Mbyte linear address space for
code and data (5 Mbytes with CAN or I2C)
– 2 Kbyte internal RAM (IRAM)
– 66 Kbyte extension RAM (XRAM)
4-channel PWM unit + 4-channel XPWM
A/D converter
– 24-channel 10-bit
– 3 µs minimum conversion time
Serial channels
– Two synchronous/asynchronous serial
channels
– Two high-speed synchronous channels
– One I2C standard interface
2 CAN 2.0B interfaces operating on 1 or 2 CAN
busses (64 or 2x32 message, C-CAN version)
Fail-safe protection
– Programmable watchdog timer
– Oscillator watchdog
External bus
– Programmable external bus configuration
and characteristics for different address
ranges
– Five programmable chip-select signals
– Hold-acknowledge bus arbitration support
Interrupt
– 8-channel peripheral event controller for
single cycle interrupt driven data transfer
– 16-priority-level interrupt system with 56
sources, sampling rate down to 15.6ns
Timers: two multi-functional general purpose
timer units with 5 timers
On-chip bootstrap loader
Clock generation
– On-chip PLL with 4 to 12 MHz oscillator
– Direct or prescaled clock input
Real-time clock and 32 kHz on-chip oscillator
Up to 111 general purpose I/O lines
– Individually programmable as input, output
or special function
– Programmable threshold (hysteresis)
Idle, Power-down and Standby modes
Single voltage supply: 5 V ±10% (embedded
regulator for 1.8 V core supply)
Two 16-channel capture / compare units
Table 1. Device summary
Order code
Package Max. CPU frequency
Iflash
Xflash
RAM Temperature range (°C)
ST10F276Z5T3 LQFP144
40 MHz
64 MHz
512 Kbytes
512 Kbytes
320 Kbytes
320 Kbytes
68Kbytes
68Kbytes
˗40 to +125
˗40 to +115
February 2017
This is information on a product in full production.
DocID12448 Rev 3
1/240
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ST10F276Z5
Contents
Contents
ST10F276Z5
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2 Pin data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4 Internal Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.2 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.2.1 Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.2.2 Modules structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.2.3 Low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.3 Write operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.3.1 Power supply drop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.4 Registers description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.4.1 Flash control register 0 low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.4.2 Flash control register 0 high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.4.3 Flash control register 1 low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.4.4 Flash control register 1 high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.4.5 Flash data register 0 low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.4.6 Flash data register 0 high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.4.7 Flash data register 1 low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4.4.8 Flash data register 1 high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4.4.9 Flash address register low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4.4.10 Flash address register high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
4.4.11 Flash error register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
4.4.12 XFlash interface control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
4.5 Protection strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
4.5.1 Protection registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
4.5.2 Flash non volatile write protection X register low . . . . . . . . . . . . . . . . . . 38
4.5.3 Flash non volatile write protection X register high . . . . . . . . . . . . . . . . . 39
4.5.4 Flash non volatile write protection I register low . . . . . . . . . . . . . . . . . . 39
4.5.5 Flash non volatile write protection I register high . . . . . . . . . . . . . . . . . . 39
4.5.6 Flash non volatile access protection register 0 . . . . . . . . . . . . . . . . . . . 40
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Features ST10F276Z5 16-bit MCU with MAC unit, 83 2 Kbyte Flash memory and 68 Kbyte RAM D atasheet - production data Features Highly performance 16-bit CPU with D SP functions – 31.25 ns instruction cycle time at 64 MHz max. CPU clock ' ?$ LQFP144 20 x 20 x 1.4mm – Multip ly/accumulate unit (MAC) 16 x 16-bit mu ltiplication, 40-bit accumulator – En hanced boolean bit manipulations – Si ngle-cycle context switching support On-chip memories – 512 Kbyte Flash memory (32-bit fetch) – 320 Kbyte ext ension Flash memory (16-bit fetch) – Single voltage Flash memories with eras e/program controller and 100 K erasing/ programming cycles. – Up to 16 Mbyte linear address space for code and data (5 Mbytes with CAN or I2C) – 2 Kbyte internal RAM (IRAM) – 66 Kbyte extens ion RAM (XRAM) • 4-channel PWM unit + 4-channel XPWM • A/D converter – 24-channel 10-bit – 3 µs minimum con version time • Serial channels – Tw o synchronous/asynchronous serial channels – Two high-speed synchronous channels – One I2C standard .
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