operational amplifiers. LF351 Datasheet


LF351 amplifiers. Datasheet pdf. Equivalent


Part Number

LF351

Description

Wide bandwidth single JFET operational amplifiers

Manufacture

STMicroelectronics

Total Page 14 Pages
Datasheet
Download LF351 Datasheet


LF351
LF351
Wide bandwidth single JFET operational amplifiers
Features
Internally adjustable input offset voltage
Low power consumption
Wide common-mode (up to VCC+) and
differential voltage range
Low input bias and offset current
Output short-circuit protection
High input impedance JFET input stage
Internal frequency compensation
Latch up free operation
High slew rate 16 V/µs (typical)
Description
These circuits are high speed JFET input single
operational amplifiers incorporating well matched,
high voltage JFET and bipolar transistors in a
monolithic integrated circuit.
The devices feature high slew rates, low input
bias and offset currents, and low offset voltage
temperature coefficient.
N
DIP8
(Plastic package)
D
SO-8
(Plastic micro package)
Pin connections
(top view)
18
27
36
45
1 - Offset null 1
2 - Inverting input
3 - Non-inverting input
4 - VCC-
5 - Offset null 2
6 - Output
7 - VCC+
8 - N.C.
April 2008
Rev 2
1/14
www.st.com
14

LF351
Schematics
1 Schematics
Figure 1. Schematic diagram
VCC
Non-inverting input
Inverting input
100W
200W
100W
30k
Output
1.3k 35k 1.3k 35k 100W
VCC
Offset Null1
Offset Null2
8.2k
Figure 2. Input offset voltage null circuit
LF351
2/14


Features LF351 Wide bandwidth single JFET operati onal amplifiers Features ■ Internall y adjustable input offset voltage ■ L ow power consumption ■ Wide common-mo de (up to VCC+) and differential voltag e range ■ Low input bias and offset c urrent ■ Output short-circuit protect ion ■ High input impedance JFET input stage ■ Internal frequency compensat ion ■ Latch up free operation ■ Hig h slew rate 16 V/µs (typical) Descript ion These circuits are high speed JFET input single operational amplifiers inc orporating well matched, high voltage J FET and bipolar transistors in a monoli thic integrated circuit. The devices fe ature high slew rates, low input bias a nd offset currents, and low offset volt age temperature coefficient. N DIP8 (P lastic package) D SO-8 (Plastic micro p ackage) Pin connections (top view) 18 2 7 36 45 1 - Offset null 1 2 - Invertin g input 3 - Non-inverting input 4 - VCC 5 - Offset null 2 6 - Output 7 - VCC+ 8 - N.C. April 2008 Rev 2 1/14 www.st.com 14 Schematics 1 Schematics Figure 1..
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